Document
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PRELIMINARY
CMOS SRAM
K6R4008V1B-C/B-L, K6R4008V1B-I/B-P
Document Title
512Kx8 Bit High Speed Static RAM(3.3V Operating). Operated at Commercial and Industrial Temperature Ranges.
Revision History
Rev No. Rev. 0.0 Rev. 1.0 History Initial release with Design Target. Release to Preliminary Data Sheet. 1.1. Replace Design Target to Preliminary. Release to Final Data Sheet. 2.1. Delete Preliminary. 2.2. Add 30pF capacitive in test load. 2.3. Relax DC characteristics. Item Previous ICC 10ns 170mA 12ns 160mA 15ns 150mA ISB f=max. 40mA ISB1 f=0 10 / 1mA IDR VDR=3.0V 0.9mA Draft Data Jan. 1st, 1997 Jun. 1st, 1997 Remark Design Target Preliminary
Rev. 2.0
Feb.11th.1998
Final
Current 205mA 200mA 195mA 50mA 10 / 1.2mA 1.0mA Jun.27th 1998 Final
Rev. 2.1
Change operating current at Industrial Temperature range. Previous spec. Changed spec. Items (10/12/15ns part) (10/12/15ns part) Icc 205/200/195mA 230/225/220mA Add 44 pins plastic TSOP(II) forward Package.
Rev. 2.2
May. 4th 1999
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
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Rev 2.2 May 1999
www.DataSheet4U.com
PRELIMINARY
CMOS SRAM
K6R4008V1B-C/B-L, K6R4008V1B-I/B-P
512K x 8 Bit High-Speed CMOS Static RAM(3.3V Operating)
FEATURES
• Fast Access Time 10,12,15ns(Max.) • Low Power Dissipation Standby (TTL) : 50mA(Max.) (CMOS) : 10mA(Max.) 1.2mA(Max.)- L-Ver. Operating K6R4008V1B-10 : 205mA(Max.) K6R4008V1B-12 : 200mA(Max.) K6R4008V1B-15 : 195mA(Max.) • Single 3.3 ±0.3V Power Supply • TTL Compatible Inputs and Outputs • Fully Static Operation - No Clock or Refresh required • Three State Outputs • 2V Minimum Data Retention ; L-Ver. only • Center Power/Ground Pin Configuration • Standard Pin Configuration K6R4008V1B-J : 36-SOJ-400 K6R4008V1B-T: 36-TSOP2-400F K6R4008V1B-U: 44-TSOP2-400AF
GENERAL DESCRIPTION
The K6R4008V1B is a 4,194,304-bit high-speed Static Random Access Memory organized as 524,288 words by 8 bits. The K6R4008V1B uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG′s advanced CMOS process and designed for highspeed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The K6R4008V1B is packaged in a 400 mil 36-pin plastic SOJ or TSOP(II) forward or 44-pin plastic TSOP(II) forward.
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
A0 A1 A3 A4 A5 A6 A7 A8 I/O1~I/O8 A2
ORDERING INFORMATION
K6R4008V1B-C10/C12/C15 Commercial Temp. Industrial Temp. K6R4008V1B-I10/I12/I15
Pre-Charge Circuit
Row Select
Memory Array 512 Rows 1024x8 Columns
Data Cont. CLK Gen.
I/O Circuit Column Select
PIN FUNCTION
Pin Name A0 - A18 WE Pin Function Address Inputs Write Enable Chip Select Output Enable Data Inputs/Outputs Power(+3.3V) Ground No Connection
A10 A12 A14 A16 A18 A9 A11 A13 A15 A17
CS OE
CS WE OE
I/O1 ~ I/O8 VCC VSS N.C
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Rev 2.2 May 1999
www.DataSheet4U.com
PRELIMINARY
CMOS SRAM
K6R4008V1B-C/B-L, K6R4008V1B-I/B-P
PIN CONFIGURATION(Top View)
N.C A0 A1 A2 A3 A4 CS I/O1 I/O2 Vcc Vss 1 2 3 4 5 6 7 8 9 10 36 N.C 35 A18 34 A17 33 A16 32 A15 31 OE 30 I/O8 N.C A0 A1 A2 A3 A4 CS I/O1
1 2 3 4 5 6 7 8 9
44 N.C 43 N.C 42 N.C 41 40 39 38 37 A18 A17 A16 A15 OE
36 I/O8 35 I/O7
36-SOJ/ TSOP2
29 I/O7 28 Vss 27 Vcc 26 I/O6 25 I/O5 24 A14 23 A13 22 A12 21 A11 20 A10 19 N.C
I/O2 10 Vcc 11 Vss 12 I/O3 13 I/O4 14 WE A5 A6 A7 A8 A9 15 16 17 18 19 20
44-TSOP2
34 Vss 33 Vcc 32 I/O6 31 I/O5 30 29 28 27 26 A14 A13 A12 A11 A10
I/O3 11 I/O4 12 WE A5 A6 A7 A8 A9 13 14 15 16 17 18
25 N.C 24 N.C 23 N.C
N.C 21 N.C 22
PIN FUNCTION
Pin Name A0 - A18 WE CS OE I/O1 ~ I/O8 VCC VSS N.C Pin Function Address Inputs Write Enable Chip Select Output Enable Data Inputs/Outputs Power(+3.3V) Ground No Connection
ABSOLUTE MAXIMUM RATINGS*
Parameter Voltage on Any Pin Relative to V SS Voltage on VCC Supply Relative to VSS Power Dissipation Storage Temperature Operating Temperature Commercial Industrial Symbol VIN, VOUT VCC PD TSTG TA TA Rating -0.5 to 4.6 -0.5 to 4.6 1.0 -65 to 150 0 to 70 -40 to 85 Unit V V W °C °C °C
* Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
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Rev 2.2 May 1999
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PRELIMINARY
CMOS SRAM
Typ 3.3 0 Max 3.6 0 VCC+0.3*** 0.8 Unit V V V V
K6R4008V1B-C/B-L, K6R4008V1B-I/B-P
RECOMMENDED DC .