EM484M1644VTA

www.DataSheet4U.com 64Mb SDRAM Ordering Information EM 48 2M 32 4 4 V T A – 5 L EOREX Logo EDO/FPM D-RAMBUS DDRSDRAM DDRSGRAM SGRAM SDRAM : : : : : : 40 41 42 43 46 48 F: PB free package Power Blank : Standard L : Low power I : Industrial Density 16M : 16 Mega Bits 8M : 8 Mega Bits 4M : 4 Mega Bits 2M : 2 Mega Bits 1M : 1 Mega Bit Organization 8 : x8 9 : x9 16 : x16 18 : x18 32 : x32 Refresh 1 : 1K, 8 : 8K 2 : 2K, 6 :16K 4 : 4K Bank 2 : 2Bank 6 : 16Bank 4 : 4Bank 3 : 32Bank 8 : 8Bank Min Cycle Time ( Max Freq.) -5 : 5ns ( 200MHz ) -6 : 5ns ( 167MHz ) -7 : 7ns ( 143MHz ) -75 : 7.5ns ( 133MHz ) -8 : 8ns ( 125MHz ) -10 : 10ns ( 100MHz ) Revision A : 1st B : 2nd C : 3rd D :4th G: for VGA version only Interface V: 3.3V R: 2.5V Package C: CSP B: uBGA T: TSOP Q: TQFP P: PQFP ( QFP ) L: LQFP URL: http://www.eorex.com Email: [email protected] Rev.01 1/33 64Mb SDRAM 64Mb( 4Banks ) Synchronous DRAM EM482M3244VTA (2Mx32) Description The EM482M3244VTA is Synchronous Dynamic Random Access Memory ( SDRAM ) organized as 524,288 words x 4 banks x 32 bits. All inputs and outputs are synchronized with the positive edge of the clock . The 64Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate in 3.3V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVTTL . Features Fully synchronous to positive clock edge Single 3.3V +...