A25L40P

www.DataSheet4U.com A25L40P Series 4 Mbit, Low Voltage, Serial Flash Memory Preliminary Document Title 4 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface Revision History Rev. No. 0.0 0.1 0.2 0.3 With 85MHz SPI Bus Interface History Initial issue Add the Fast Read Dual Operation Instruction Add QFN 8L (5 x 6mm) package type Add QFN 8L (5 x 6mm) package outline dimensions Modify the Part No. for Top/Bottom boot sector type Add DIP 8(300mil) package type Modify the maximum clock rate to 75MHz Issue Date August 29, 2006 April 4, 2006 April 20, 2006 September 5, 2006 Remark Preliminary 0.4 Add transient voltage (<20ns) on any pin to ground potential spec. Add the maximum clock rate of 3.0V~3.6V : 85MHz May 25, 2007 PRELIMINARY (May, 2007, Version 0.4) AMIC Technology Corp. A25L40P Series 4 Mbit, Low Voltage, Serial Flash Memory Preliminary FEATURES 4 Mbit of Flash Memory Flexible Sector Architecture (4/4/8/16/32)KB/64x7 KB Bulk Erase (4 Mbit) in 6s (typical) Sector Erase (512 Kbit) in 1s (typical) Page Program (up to 256 Bytes) in 3ms (typical) 2.7 to 3.6V Single Supply Voltage SPI Bus Compatible Serial Interface 85MHz Clock Rate (maximum) Deep Power-down Mode 1µA (typical) Top or Bottom boot block configuration available Electronic Signatures - JEDEC Standard two-Byte Signature (2013h) - RES Instruction, One-Byte, Signature (12h), for backward compatibility „ Package options - 8-pin SOP (150mil or 209mil), 16-pin SOP, 8-pin DIP (300mil) or 8-pin QF...