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IDT70P9268L

IDT

MOBILE MULTIMEDIA INTERFACE VERY LOW POWER 1.8V 16K X 16 SYNCHRONOUS DUAL-PORT STATIC RAM

www.DataSheet4U.com MOBILE MULTIMEDIA INTERFACE (M2I) Final VERY LOW POWER 1.8V Datasheet 16K X 16 IDT70P9268L SYNCHRON...


IDT

IDT70P9268L

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www.DataSheet4U.com MOBILE MULTIMEDIA INTERFACE (M2I) Final VERY LOW POWER 1.8V Datasheet 16K X 16 IDT70P9268L SYNCHRONOUS DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ True Dual-Ported Memory Cells – Allows simultaneous access of the same memory location ◆ High per-port throughput performance – Industrial: 800 Mbps ◆ Low-Power Operation – Active: 15 mA (typ.) – Standby: 2 uA (typ.) ◆ Multiplexed address and data I/Os ◆ ◆ ◆ ◆ Counter enable and repeat features Full synchronous operation on both ports Separate upper-byte and lower-byte controls for multiplexed bus and bus matching compatibility LVTTL-compatible, single 1.8V (+/- 100mV) power supply Industrial temperature range (-40C to +85C) Available in a 100-ball fpBGA (fine pitch BGA) Green parts available, see ordering information Block Diagram A0L – A13L I/O0L – I/O15L ADSL UBL LBL CNTEN L CNTRPT L CLKL DATA0L – DATA15L DATA0R – DATA15R I/O0R – I/O15R ADSR UBR 16K x 16 Address/Data I/O Control Addr0L – Addr 13L MEMORY ARRAY Addr0R – Addr 13R Address/Data I/O Control LBR CNTEN R CNTRPT R CLKR SPECIAL FUNCTION SFEN LOGIC SF0 – SF 7 CEL OEL R/WL INTL CLKL CONTROL LOGIC CER OER R/WR INTR CLKR ZZ CONTROL ZZL ZZR LOGIC NOTES: 1. This block diagram depicts operation with the address and data signals mux’d on the right port but not on the left port. If each port is set to operate with the address and data signals mux’d, then both sides of the block diagram will be the same as the right port pictured above. 1 of 23 ...




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