IDT70P257

www.DataSheet4U.com VERY LOW POWER 1.8V 8K/4K x 16 DUAL-PORT STATIC RAM Features ◆ ◆ PRELIMINARY IDT70P257/247L ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Industrial: 55ns (max.) Low-power operation IDT70P257/247L Active: 27mW (typ.) Standby: 3.6µW (typ.) Separate upper-byte and lower-byte control for multiplexed bus compatibility IDT70P257/247 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ M/S = VDD for BUSY output flag on Master M/S = VSS for BUSY input on Slave Input Read Register Output Drive Register BUSY and Interrupt Flag On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port LVTTL-compatible, single 1.8V (±100mV) power supply Available in 100 Ball 0.5mm-pitch BGA Industrial temperature range (-40°C to +85°C) Functional Block Diagram R/WL UBL R/WR UBR LBL CEL OEL LBR CER OER I/O8L-I/O15L I/O0L-I/O7L BUSYL (2,3) I/O8R-I/O15R I/O Control I/O Control I/O0R-I/O7R BUSYR (2,3) , A12L(1) A0L Address Decoder MEMORY ARRAY Address Decoder A12R(1) A0R CEL OEL R/WL IRR0,IRR1 INPUT READ REGISTER AND OUTPUT DRIVE REGISTER SFEN 13 13 CER OER R/WR ODR 0 - ODR4 CEL OEL R/WL SEML (3) INTL ARBITRATION INTERRUPT SEMAPHORE LOGIC CER OER R/WR SEMR INTR(3) 5684 drw 01 M/S NOTES: 1. A12X is a NC for IDT70P247. 2. (MASTER...