DatasheetsPDF.com

ICSSSTUAF32868A

IDT
Part Number ICSSSTUAF32868A
Manufacturer IDT
Description 28-BIT CONFIGURABLE REGISTERED BUFFER
Published Oct 2, 2007
Detailed Description www.DataSheet4U.com DATASHEET 28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 CONFIDENTIAL ICSSSTUAF32868A Descripti...
Datasheet PDF File ICSSSTUAF32868A PDF File

ICSSSTUAF32868A
ICSSSTUAF32868A

Overview
www.
DataSheet4U.
com DATASHEET 28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 CONFIDENTIAL ICSSSTUAF32868A Description This 28-bit 1:2 configurable registered buffer is designed for 1.
7V to 1.
9V VDD operation.
All inputs are compatible with the JEDEC standard for SSTL_18, except the chip-select gate-enable (CSGEN), control (C), and reset (RESET) inputs, which are LVCMOS.
All outputs are edge-controlled circuits optimized for unterminated DIMM loads, and meet SSTL_18 specifications, except the open-drain error (QERR) output.
The ICSSSTUAF32868A operates from a differential clock (CLK and CLK).
Data are registered at the crossing of CLK going high and CLK going low.
The device supports low...


Similar Datasheet


Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)