Document
www.DataSheet4U.com
DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD8880
(10680 × 10680) PIXELS × 3 COLOR CCD LINEAR IMAGE SENSOR
DESCRIPTION
The µ PD8880 is a color CCD (Charge Coupled Device) linear image sensor which changes optical images to electrical signal and has the function of color separation. The µ PD8880 has 3 rows of (10680+10680) staggered pixels, and each row has a dual-sided readout type of charge transfer register. And it has reset feed-through level clamp circuits and voltage amplifiers. Therefore, it is suitable for 2400 dpi/A4 color image scanners, color facsimiles and so on.
FEATURES
• Valid photocell • Photocell pitch • Line spacing • Color filter • Resolution : • Data rate • Power supply • On-chip circuits :: : (10680+10680) pixels × 3 : 4 µm : 64 µ m (16 lines) Red line - Green line, Green line - Blue line 8 µm (2 lines) Odd line – Even line (for each color) : Primary colors (red, green and blue), pigment filter (with light resistance 10 lx•hour) : 96 dot/mm A4 (210 × 297 mm) size (shorter side) 2400 dpi US letter (8.5” × 11”) size (shorter side) : 8 MHz Max. : +12 V : Reset feed-through level clamp circuits Voltage amplifiers
7
• Drive clock level : CMOS output under 5 V operation
ORDERING INFORMATION
Part Number Package CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))
µ PD8880CY
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.
Document No. S16032EJ3V0DS00 (3rd edition) Date Published July 2003 NS CP (K) Printed in Japan
The mark
shows major revised points.
2002
µ PD8880
BLOCK DIAGRAM
VOD 29 GND GND 1 16
φ 2L
19
φ2
20
φ1
13
CCD analog shift register Transfer gate
S21359 D14 D66 S21360 D65 D67 D69
18
D68
Transfer gate CCD analog shift register CCD analog shift register Transfer gate
S21359 D14 D66 S21360 D65 D67 D69
S2
VOUT1 30 (Blue)
D64
φTG1 (Blue)
S1
····
Photocell (Blue)
17
D68
S2
VOUT2 31 (Green)
D64
φ TG2 (Green)
S1
····
Photocell (Green) Transfer gate
CCD analog shift register CCD analog shift register Transfer gate
S21359 D64 D66 S21360 D65 D67 D69
15
D68
Transfer gate CCD analog shift register
3
2
14
S2
VOUT3 32 (Red)
D14
φ TG3 (Red)
S1
····
Photocell (Red)
5
4
φ CLB φ RB
φ 1L
φ2
φ1
2
Data Sheet S16032EJ3V0DS
µ PD8880
PIN CONFIGURATION (Top View)
CCD linear image sensor 32-pin plastic DIP (10.16 mm (400)) • µ PD8880CY
Ground Reset gate clock Reset feed-through level clamp clock Shift register clock 1 Shift register clock 2 Internal connection Internal connection No connection No connection No connection Internal connection Internal connection Shift register clock 1 Last stage shift register clock 1 Transfer gate clock 3 (for Red) Ground
GND
1 2
32 31
VOUT3 VOUT2 VOUT1 VOD NC IC IC NC NC NC IC IC
Output signal 3 (Red) Output signal 2 (Green) Output signal 1 (Blue) Output drain voltage No connection Internal connection Internal connection No connection No connection No connection Internal connection Internal connection Shift register clock 2 Last stage shift register clock 2 Transfer gate clock 1 (for Blue) Transfer gate clock 2 (for Green)
φ RB φ CLB
1
1
1
3 4 5 6 7 8
30 29 28 27 26 25 24 23 22 21 20 19 18 17
φ1
φ2
IC IC NC NC NC IC IC
Green
9 10 11 12 13 14 15 16
φ1
Blue
Red
φ2 φ 2L φ TG1 φ TG2
21360
21360
φ TG3
GND
Cautions 1. Leave pins 6 , 7, 11, 12, 21, 22, 26, 27 (IC) unconnected. 2. Connect the No connection pins (NC) to GND.
21360
φ 1L
Data Sheet S16032EJ3V0DS
3
µ PD8880
PHOTOCELL STRUCTURE DIAGRAM
2 µm
2 µm
4 µm
Channel stopper
Aluminum shield
PHOTOCELL ARRAY STRUCTURE DIAGRAM (Line spacing)
4 µm 4 µm 4 µm Blue photocell array Blue photocell array
2 lines (8 µ m) 14 lines (56 µ m) 16 lines (64 µ m)
4 µm 4 µm 4 µm
Green photocell array Green photocell array
2 lines (8 µ m) 14 lines (56 µ m) 16 lines (64 µ m)
4 µm 4 µm 4 µm
Red photocell array Red photocell array
2 lines (8 µ m)
4
Data Sheet S16032EJ3V0DS
µ PD8880
ABSOLUTE MAXIMUM RATINGS (TA = +25°C)
Parameter Output drain voltage Shift register clock voltage Reset gate clock voltage Reset feed-through level clamp clock voltage Transfer gate clock voltage Operating ambient temperature Storage temperature
Note
Symbol VOD Vφ 1, Vφ 2, Vφ 1L, Vφ 2L Vφ RB Vφ CLB
Ratings −0.3 to +15 −0.3 to +8 −0.3 to +8 −0.3 to +8 −0.3 to +8 0 to +60 −40 to +70
Unit V V V V
Vφ TG1 to Vφ TG3 TA Tstg
V °C °C
Note Use at the condition without dew condensation. Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute max.