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GM5115-H Dataheets PDF



Part Number GM5115-H
Manufacturers ETC
Logo ETC
Description (GM5115 / GM5125) ONPANEL LCD PANEL CONTROLLER
Datasheet GM5115-H DatasheetGM5115-H Datasheet (PDF)

www.DataSheet4U.com Genesis Microchip Publication PRELIMINARY DATA SHEET gm5115/gm5115-H gm5125/gm5125-H OnPanel LCD Panel Controller *** Genesis Microchip Confidential *** NOTE: Sections in this data sheet that mention HDCP apply only to the HDCP-enabled chip versions (gm5115-H and gm5125-H). All other sections apply to all chip versions (gm5115, gm5115-H, gm5125, and gm5125-H). Publication number: C5115-DAT-01H Publication date: June 2002 Genesis Microchip Inc. 2150 Gold Street, Alviso, .

  GM5115-H   GM5115-H



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www.DataSheet4U.com Genesis Microchip Publication PRELIMINARY DATA SHEET gm5115/gm5115-H gm5125/gm5125-H OnPanel LCD Panel Controller *** Genesis Microchip Confidential *** NOTE: Sections in this data sheet that mention HDCP apply only to the HDCP-enabled chip versions (gm5115-H and gm5125-H). All other sections apply to all chip versions (gm5115, gm5115-H, gm5125, and gm5125-H). Publication number: C5115-DAT-01H Publication date: June 2002 Genesis Microchip Inc. 2150 Gold Street, Alviso, P.O. Box 2150, CA USA 95002 Tel: (408) 262-6599 Fax: (408) 262-6365 165 Commerce Valley Dr. West, Thornhill, ON Canada L3T 7V8 Tel: (905) 889-5400 Fax: (905) 889-5422 1096, 12thA Main, Hal II Stage, Indira Nagar, Bangalore-560 008, India, Tel: (91)-80-526-3878, Fax: (91)-80-529-6245 4F, No. 24, Ln 123, Sec 6, Min-Chuan E. Rd., Taipei, Taiwan, ROC Tel: 886-2-2791-0118 Fax: 886-2-2791-0196 143-37 Hyundai Tower, #902, Samsung-dong, Kangnam-gu, Seoul, Korea 135-090 Tel 82-2-553-5693 Fax 82-2-552-4942 Rm2614-2618 Shenzhen Office Tower, 6007 Shennan Blvd, 518040, Shenzhen, Guandong, P.R.C., Tel (0755)386-0101, Fax (0755)386-7874 2-9-5 Higashigotanda, Shinagawa-ku, Tokyo, 141-0022, Japan, Tel 81-3-5798-2758, Fax 81-3-5798-2759 www.genesis-microchip.com / [email protected] *** Genesis Microchip Confidential *** gm5115/25 Preliminary Data Sheet Trademarks: RealColor, Real Recovery, and Ultra-Reliable DVI are trademarks of Genesis Microchip Inc. © Copyright 2002, Genesis Microchip Inc. All Rights Reserved. Genesis Microchip Inc. reserves the right to change or modify the information contained herein without notice. It is the customer’s responsibility to obtain the most recent revision of the document. Genesis Microchip Inc. makes no warranty for the use of its products and bears no responsibility for any errors or omissions that may appear in this document. June 2002 ii C5115-DAT-01H *** Genesis Microchip Confidential *** Revision History Document C5115-DAT-01A C5115-DAT-01B Description • Initial release. gm5115/25 Preliminary Data Sheet Date March 2001 June 2001 C5115-DAT-01C C5115-DAT-01D C5115-DAT-01E C5115-DAT-01F • In Table 18 corrected description of OSC_SEL (on pin ROM_ADDR13). It should be set to 1 to indicate usage of a single-ended clock oscillator. • Corrected image and orientation of logo in pin out diagram Figure 2. • Added section 4.11.3. • Replaced all occurrences of CVDD with CVDD_2.5, including pin numbers 26, 88, 134 and 203 to make them consistent with the names of other 2.5V voltage supply signals. • Pin number 205 name changed from GPIO16/HFS to GPIO16/HFSn and all occurrences of HFS replaced with HFSn to reflect the fact that this signal is active low. • Added description of 2-wire serial protocol in section 4.17.2 and Table 24. • Removed “Read with Increment” operation description. • Corrected mechanical specification in Figure 32. • Changes to Table 21 – DC Characteristics: - Maximum voltage for 5V-tolerance inputs is 5.5V. - Added maximum current requirements. • Added description of OCM Standalone configuration Figure 26. • Added Figure 22 – Panel Power Sequencing. • Added description of gm5125 (SXGA device). • Pin names changed to reflect alternate hard-wired functions: - pin 50 from GPIO11 to GPIO11/ROM_WEn, - pin 51 from GPIO12 to GPIO12/NVRAM_SDA, - pin 52 from GPIO13 to GPIO13/NVRAM_SCL, - pin 6 from DDC_SCL to GPIO14/DDC_SCL, - pin 7 from DDC_SDA to GPIO15/DDC_SDA, - pin 46 from GPIO6 to GPIO6/TCON_SHC, - pin 47 from GPIO7 to GPIO7/TCON_TDIV. • Removed description of 6-wire host interface, since this is not recommended operation. Pin 1 name changed from GPIO17/HDATA0 to GPIO17, and similarly for pins 206, 207 and 208. • Corrected maximum ADC sampling frequency in Table 15 and maximum ADC_CLK frequency in Table 22 to 162.5MHz. • Added section 4.5 Test Pattern Generator. • Added description of TCON_SHC and TCON_TDIV in section 4.13.1. • Clarifications to section 4.1 describing clock generation, section 4.7.2 describing sRGB support, and section 4.15.3 describing GPIOs. • Removed mention of row attributes in Figure 25. gm5115/25 OSD controller does not have row attributes. • Corrected Table 21, Note 3. Pins VDD1_ADC_2.5, VDD2_ADC_2.5, VDD_RX0_2.5, VDD_RX1_2.5 and VDD_RX2_2.5 are digital 2.5V supplies, not analog. • Changed signal names SCL and SDA to HCLK and HFSn, respectively in Figure 29, Figure 30, and Figure 31. • Added note on Front Cover regarding HDCP enabled versions. • Added section 4.12 - Energy Spectrum Management (ESM). • Added clarification in section 4.13.1 indicating that single bus configurations are supported in XGA column drivers only. • In section 4.16, clarified that ROM_ADDR[15:0] have internal 60KΩ pull-down resistor. • Changes to Table 20 – Absolute Maximum Ratings: – Renamed parameters θJA_XGA, θJA_SXGA, θJC_XGA and θJC_SXGA to θJA_5115, θJA_5125, θJC_5115 and θJC_5125 and revised their values. – Added note (4) regarding the maximum case temperature..


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