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CY28404 Dataheets PDF



Part Number CY28404
Manufacturers Cypress Semiconductor
Logo Cypress Semiconductor
Description CK409-COMPLIANT CLOCK SYNTHESIZER
Datasheet CY28404 DatasheetCY28404 Datasheet (PDF)

www.DataSheet4U.com CY28404 CK409-Compliant Clock Synthesizer Features • Supports Intel Springdale/Prescott (CK409) • Selectable CPU frequencies • 3.3V power supply • Nine copies of PCI clock • Four copies 3V66 clock with optional VCH • Three copies 48-MHz clock • Three copies REF clock • Two differential CPU clock pairs • Support SMBus/I2C Byte, Word, and Block Read/Write • Dial-A-Frequency • Ideal Lexmark Spread Spectrum profile for maximum electromagnetic interference (EMI) reduction • 48.

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www.DataSheet4U.com CY28404 CK409-Compliant Clock Synthesizer Features • Supports Intel Springdale/Prescott (CK409) • Selectable CPU frequencies • 3.3V power supply • Nine copies of PCI clock • Four copies 3V66 clock with optional VCH • Three copies 48-MHz clock • Three copies REF clock • Two differential CPU clock pairs • Support SMBus/I2C Byte, Word, and Block Read/Write • Dial-A-Frequency • Ideal Lexmark Spread Spectrum profile for maximum electromagnetic interference (EMI) reduction • 48-pin SSOP package Table 1. Frequency Table CPU x2 3V66 x4 PCI x9 REF x3 48M x3 Block Diagram XIN XOUT Pin Configuration **FS_A/REF_0 **FS_B/REF_1 VDD_REF VDD_CPU XIN CPUT(0:1), CPUC(0:1) XOUT VSS_REF *FS_C/PCIF0 *FS_D/PCIF1 *FS_E/PCIF2 VDD_PCI VSS_PCI VDD_3V66 PCI0 3V66_(0:2) PCI1 PCI2 VDD_PCI PCI3 PCIF(0:2) VDD_PCI VSS_PCI PCI(0:5) PCI4 PCI5 RESET#/PD# 3V66_3/VCH *SEL24#/24_48MHz DOT_48 USB_48 VDD_48MHz VSS_48 DOT_48 USB_48 24_48MHz 2 XTAL OSC PLL 1 PLL Ref Freq Divider Network VDD_REF REF(0:2) FS_(A:E) VTT_PWRGD# IREF SEL24# SELVCH PLL2 2 MODE PD# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 REF_2 VDDA VSSA IREF VSS_CPU CPUT1 CPUC1 VDD_CPU CPUT0 CPUC0 VSS DNC*** DNC*** VDD VTT_PWRGD# SDATA* SCLK* 3V66_0 3V66_1 VSS_3V66 VDD_3V66 3V66_2/MODE* 3V66_3/VCH/SELVCH** VDD_48 ~ SSOP-48 * 150k Internal Pull-up ** 150k Internal Pull-down *** Do Not Connect CY28404 SDATA SCLK I2C Logic WD Timer RESET# Cypress Semiconductor Corporation Document #: 38-07510 Rev. *B • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Revised June 16, 2004 CY28404 Pin Description Pin No. 1, 2, 48 1, 2, 7, 8, 9 4 Name REF(0:2) FS_A, FS_B, FS_C, I FS_D, FS_E XIN I Type O, SE Description Reference Clock. 3.3V 14.318-MHz clock output. 3.3V LVTTL Latched Input for CPU Frequency Selection. Crystal Connection or External Reference Frequency Input. This pin has dual functions. It can be used as an external 14.318-MHz crystal connection or as an external reference frequency input. Crystal Connection. Connection for an external 14.318-MHz crystal output. CPU Clock Output. Differential CPU clock outputs. CPU Clock Output. Differential CPU clock outputs. Do Not Connect O, SE I/O, SE PD I/O, SE PU 66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO. 48- or 66-MHz Clock Output. 3.3V selectable through external SELVCH strapping resistor and SMBus to be 66 MHz or 48 MHz. Default is 66 MHz. 0 = 66 MHz, 1 = 48 MHz 66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO. Reset or Power-down Mode Select. Selects between RESET# output or PWRDWN# input for the PWRDWN#/RESET# pin. Default is RESET#. 0 = PD, 1 = RESET. PCI Clock Output. 33-MHz clocks divided down from 3V66. Fixed 48-MHz Clock Output. Fixed 48-MHz Clock Output. Current Reference. A precision resistor is attached to this pin which is connected to the internal current reference. 3.3V LVTTL Input for PowerDown# active.


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