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MC9S08LC60 Dataheets PDF



Part Number MC9S08LC60
Manufacturers Freescale Semiconductor
Logo Freescale Semiconductor
Description (MC9S08LC36 / MC9S08LC60) Microcontrollers
Datasheet MC9S08LC60 DatasheetMC9S08LC60 Datasheet (PDF)

MC9S08LC60 MC9S08LC36 Data Sheet: Advance Information This document contains information on a new product under development. Freescale reserves the right to change or discontinue this product without notice. www.DataSheet4U.com HCS08 Microcontrollers MC9S08LC60 Rev. 2 02/2007 freescale.com PRELIMINARY MC9S08LC60 Features 8-Bit HCS08 Central Processor Unit (CPU) • • • • 40-MHz HCS08 CPU HC08 instruction set with added BGND instruction Background debugging system Breakpoint capability to allo.

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MC9S08LC60 MC9S08LC36 Data Sheet: Advance Information This document contains information on a new product under development. Freescale reserves the right to change or discontinue this product without notice. www.DataSheet4U.com HCS08 Microcontrollers MC9S08LC60 Rev. 2 02/2007 freescale.com PRELIMINARY MC9S08LC60 Features 8-Bit HCS08 Central Processor Unit (CPU) • • • • 40-MHz HCS08 CPU HC08 instruction set with added BGND instruction Background debugging system Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus two more breakpoints in on-chip debug module) In-Circuit Emulator (ICE) debug module containing two comparators and nine trigger modes. Eight deep FIFO for storing change-of-flow addresses and event-only data. ICE debug module supports both tag and force breakpoints. Support for up to 32 interrupt/reset sources Peripherals • LCD (liquid crystal display driver) — Compatible with 5-V or 3-V LCD glass displays; functional in wait and stop3 low-power modes; selectable frontplane and backplane configurations: – – • 4 x 40 or 3 x 41 (80-pin package) 4 x 32 or 3 x 33 (64-pin package) • • • Memory Options • Dual on-chip in-circuit programmable FLASH memories with block protection and security options; 60K and 36K options available Program/erase of one FLASH array while executing from another On-chip random-access memory (RAM); 4K and 2.5K options available • • • • • • Power-Saving Features • • • Wait plus three stops Software disable of clock monitor and low-voltage interrupt (LVI) for lowest stop current Software-generated real-time clock (RTC) functions using real-time interrupt (RTI) • ACMP (analog comparator) — option to compare to internal reference voltage; output is software selectable to be driven to the input capture of TPM1 channel 0. ADC (analog-to-digital converter) — 8-channel, 12bit with automatic compare function, asynchronous clock source, temperature sensor and internal bandgap reference channel. ADC is hardware triggerable using the RTI counter. SCI (serial communications interface) — available single-wire mode SPI1 and SPI2 — Two serial peripheral interface modules KBI — Two 8-pin keyboard interrupt modules with software selectable rising or falling edge detect IIC — Inter-integrated circuit bus module capable of operation up to 100 kbps with maximum bus loading; capable of higher baudrates with reduced loading TPM1 and TPM2 — Two timer/pulse-width modulators with selectable input capture, output compare, and edge-aligned PWM capability on each channel. Each timer module may be configured for buffered, centered PWM (CPWM) on all channels. Configurable Clock Source • Clock source options include crystal, resonator, external clock, or internally generated clock with precision nonvolatile memory (NVM) trimming Automatic clock monitor function Input/Output • Up to 24 general-purpose input/output (I/O) pins; includes two output-only pins and one input-only pin Software selectable pullups on ports when used as input. Selection is on an individual port bit basis. Software selectable slew rate control on ports when used as outputs (selection is on an individual port bit basis) Software selectable drive strength control on ports when used as outputs (selection is on an individual port bit basis) Internal pullup on RESET and IRQ pin to reduce customer system cost • • • System Protection • • • Optional computer operating properly (COP) reset Low-voltage detection with reset or interrupt Illegal opcode detection with reset • Package Options • • • 64-pin low-profile quad flat package (LQFP) 80-pin LQFP MC9S08LC60 Data Sheet Covers: MC9S08LC60 MC9S08LC36 MC9S08LC60 Rev. 2 02/2007 This document contains information on a new product under development. Freescale reserves the right to change or discontinue this product without notice. PRELIMINARY Revision History To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com The following revision history table summarizes changes contained in this document. Revision Number 2 Revision Date 02/2007 Description of Changes Significant changes to LCD chapter and orderable part numbers This document contains information on a new product under development. Freescale reserves the right to change or discontinue this product without notice. This product incorporates SuperFlash® technology licensed from SST. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. © Freescale Semiconductor, Inc., 2007. All rights reserved. MC9S08LC60 Series Advance Information Data Sheet, Rev. 2 6 PRELIMINARY Freescale Semiconductor Chapters Chapter 1 Chapter 2 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Chapter 7 Chapter 8 Chapter 9 Chapter 10 Chapter 11 Chapter 12 Chapter 13 Chapter 14 Chapter 15 Chapter 16 C.


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