Document
Freescale Semiconductor, Inc.
HC05J5AGRS/H REV 2.1
Freescale Semiconductor, Inc...
68HC05J5A 68HRC05J5A 68HC705J5A 68HRC705J5A
SPECIFICATION (General Release)
www.DataSheet4U.com
July 16, 1999
Semiconductor Products Sector
For More Information On This Product, Go to: www.freescale.com
Freescale Semiconductor, Inc.
www.DataSheet4U.com
Freescale Semiconductor, Inc...
For More Information On This Product, Go to: www.freescale.com
Freescale Semiconductor, Inc.
July 16, 1999 GENERAL RELEASE SPECIFICATION
TABLE OF CONTENTS Section SECTION 1 GENERAL DESCRIPTION 1.1 1.2 1.3 1.4 1.5 1.5.1 1.5.2 1.5.3 1.5.4 1.5.5 1.5.6 FEATURES ...................................................................................................... 1-1 MASK OPTIONS.............................................................................................. 1-2 MCU STRUCTURE.......................................................................................... 1-2 PIN ASSIGNMENTS ........................................................................................ 1-4 FUNCTIONAL PIN DESCRIPTION.................................................................. 1-4 VDD AND VSS .............................................................................................. 1-4 OSC1, OSC2/R............................................................................................ 1-4 RESET......................................................................................................... 1-6 IRQ (MASKABLE INTERRUPT REQUEST)................................................ 1-6 PA0-PA7 ...................................................................................................... 1-6 PB0-PB5 ...................................................................................................... 1-7 SECTION 2 MEMORY 2.1 2.2 2.3 2.4 I/O AND CONTROL REGISTERS ................................................................... 2-2 RAM ................................................................................................................. 2-2 ROM................................................................................................................. 2-2 I/O REGISTERS SUMMARY ........................................................................... 2-3 SECTION 3 CENTRAL PROCESSING UNIT 3.1 3.2 3.3 3.4 3.5 3.6 3.6.1 3.6.2 3.6.3 3.6.4 3.6.5 REGISTERS .................................................................................................... 3-1 ACCUMULATOR (A)........................................................................................ 3-2 INDEX REGISTER (X) ..................................................................................... 3-2 STACK POINTER (SP) .................................................................................... 3-2 PROGRAM COUNTER (PC) ........................................................................... 3-2 CONDITION CODE REGISTER (CCR) ........................................................... 3-3 Half Carry Bit (H-Bit) .................................................................................... 3-3 Interrupt Mask (I-Bit) .................................................................................... 3-3 Negative Bit (N-Bit) ...................................................................................... 3-3 Zero Bit (Z-Bit) ............................................................................................. 3-3 Carry/Borrow Bit (C-Bit) ............................................................................... 3-4 SECTION 4 INTERRUPTS 4.1 4.2 4.3 4.4 4.5 4.5.1 CPU INTERRUPT PROCESSING ................................................................... 4-1 RESET INTERRUPT SEQUENCE .................................................................. 4-2 SOFTWARE INTERRUPT (SWI) ..................................................................... 4-3 HARDWARE INTERRUPTS ............................................................................ 4-3 EXTERNAL INTERRUPT (IRQ)....................................................................... 4-3 IRQ CONTROL/STATUS REGISTER (ICSR) $0A...................................... 4-5
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www.DataSheet4U.com
Freescale Semiconductor, Inc...
REV 2.1
Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION July 16, 1999
TABLE OF CONTENTS Section 4.5.2 4.5.3 4.5.4 Page OPTIONAL EXTERNAL INTERRUPTS (PA0-PA3) .................................... 4-6 TIMER INTERRUPT (MFT) ......................................................................... 4-7 TIMER1 INTERRUPT (16-BIT TIMER)........................................................ 4-7 SECTION 5 RESETS 5.1 EXTERNAL RESET (RESET).......................................................................... 5-2 5.2 INTERNAL RESETS ........................................................................................ 5-2 5.2.1 POWER-ON RESET (POR) ........