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MQ82C55A Dataheets PDF



Part Number MQ82C55A
Manufacturers Intersil Corporation
Logo Intersil Corporation
Description CMOS Programmable Peripheral Interface
Datasheet MQ82C55A DatasheetMQ82C55A Datasheet (PDF)

® MS82C55A, MQ82C55A, MP82C55A Data Sheet June 15, 2006 FN6140.2 CMOS Programmable Peripheral Interface The Intersil 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). The MX82C55A has identical features as the X82C55 with the exception of no bus hold devices on the port pins. It is a general purpose programmable I/O device which may be used with many different microprocessors. There are .

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® MS82C55A, MQ82C55A, MP82C55A Data Sheet June 15, 2006 FN6140.2 CMOS Programmable Peripheral Interface The Intersil 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). The MX82C55A has identical features as the X82C55 with the exception of no bus hold devices on the port pins. It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins which may be individually programmed in two groups of www.DataSheet4U.com 12 and used in three major modes of operation. The high performance and industry standard configuration of the 82C55A make it compatible with the 80C86, 80C88 and other microprocessors. Static CMOS circuit design insures low operating power. The Intersil advanced SAJI process results in performance equal to or greater than existing functionally equivalent products at a fraction of the power. Features • Pb-Free Plus Anneal Available (RoHS Compliant) (See Ordering Info) • Pin Compatible with OKI MSM82C55A - No Bus Hold Devices on any Port Pins • 24 Programmable I/O Pins • Fully TTL Compatible • High Speed, No “Wait State” Operation with 8MHz 80C86 and 80C88 • Direct Bit Set/Reset Capability • Enhanced Control Word Read Capability • L7 Process • 2.5mA Drive Capability on All I/O Ports • Low Standby Power (ICCSB) . . . . . . . . . . . . . . . . . . .10µA Ordering Information PART NUMBERS* (Note) PART MARKING TEMP. RANGE (°C) 0 to 70 0 to 70 -40 to 85 0 to 70 -40 to 85 44 Ld MQFP Q44.10x10 PACKAGE (Pb-free) PKG. DWG. # CMP82C55AZ CMP82C55AZ CMS82C55AZ CMS82C55AZ IMS82C55AZ IMS82C55AZ 40 Ld PDIP** E40.6 44 Ld PLCC N44.65 CMQ82C55AZ CMQ82C55AZ IMQ82C55AZ IMQ82C55AZ *Add “96” suffix to part number for tape and reel packaging. **Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. MS82C55A, MQ82C55A, MP82C55A Pinouts MS82C55A (PLCC) TOP VIEW RD PA0 PA1 PA2 PA3 NC PA4 PA5 PA6 PA7 WR PA0 PA1 RD MQ82C55A (MQFP) TOP VIEW PA2 PA3 PA4 PA5 PA6 PA7 WR NC 6 5 4 3 2 1 44 43 42 41 40 CS GND A1 A0 PC7 NC PC6 PC5 PC4 PC0 www.DataSheet4U.com PC1 7 8 9 10 11 12 13 14 15 16 17 18 1920 21 22 23 24 25 26 27 28 PC2 PC3 PB0 PB1 PB2 NC PB3 PB4 PB5 PB6 PB7 39 38 37 36 35 34 33 32 31 30 29 RESET D0 D1 D2 D3 NC D4 D5 D6 D7 VCC 44 43 42 41 40 39 38 37 36 35 34 33 2 32 3 4 5 6 7 8 9 10 31 30 29 28 27 26 25 24 CS GND A1 A0 PC7 PC6 PC5 PC4 PC0 PC1 PC2 1 RESET D0 D1 D2 D3 D4 D5 D6 D7 VCC PB7 11 23 12 13 14 15 16 17 18 19 20 21 22 PC3 PB0 PB1 PB2 PB3 PB4 PB5 PB6 NC NC CMP82C55A (PDIP) TOP VIEW PA3 1 PA2 2 PA1 3 PA0 4 RD 5 CS 6 GND 7 A1 8 A0 9 PC7 10 PC6 11 PC5 12 PC4 13 PC0 14 PC1 15 PC2 16 PC3 17 PB0 18 PB1 19 PB2 20 40 PA4 39 PA5 38 PA6 37 PA7 36 WR 35 RESET 34 D0 33 D1 32 D2 31 D3 30 D4 29 D5 28 D6 27 D7 26 VCC 25 PB7 24 PB6 23 PB5 22 PB4 21 PB3 2 NC FN6140.2 June 15, 2006 MS82C55A, MQ82C55A, MP82C55A Pin Description SYMBOL VCC GND D0-D7 RESET CS RD WR A0-A1 www.DataSheet4U.com I/O I I I I I TYPE DESCRIPTION VCC: The +5V power supply pin. A 0.1µF capacitor between VCC and GND is recommended for decoupling. GROUND DATA BUS: The Data Bus lines are bidirectional three-state pins connected to the system data bus. RESET: A high on this input clears the control register and all ports (A, B, C) are set to the input mode. CHIP SELECT: Chip select is an active low input used to enable the 82C55A onto the Data Bus for CPU communications. READ: Read is an active low input control signal used by the CPU to read status information or data via the data bus. WRITE: Write is an active low input control signal used by the CPU to load control words and data into the 82C55A. ADDRESS: These input signals, in conjunction with the RD and WR inputs, control the selection of one of the three ports or the control word register. A0 and A1 are normally connected to the least significant bits of the Address Bus A0, A1. PORT A: 8-bit input and output port. PORT B: 8-bit input and output port. PORT C: 8-bit input and output port. PA0-PA7 PB0-PB7 PC0-PC7 I/O I/O I/O Functional Diagram POWER SUPPLIES +5V GND GROUP A CONTROL GROUP .


MS82C55A MQ82C55A XB1002


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