HI2325

HI2325 TM Data Sheet March 2000 File Number 4823.1 3.3V Dual 8-Bit, 40MSPS A/D Converter with Internal Reference and Digital Clamp The HI2325 is a monolithic, dual 8-bit, 40MSPS analog-todigital converter fabricated in an advanced CMOS process. It is designed for high speed applications where integration, bandwidth and accuracy are essential. The HI2325 features a 2-stage parallel architecture. Only one external clock is necessary to drive both converters and an internal voltage reference is provided allowing the system designer to realize an increased level of system integration resulting in decreased cost and power dissipation. The HI2325 has excellent dynamic performance while consuming less than 100mW power at 40MSPS. The A/D only requires a single +3.3V power supply and encode clock. Data output latches are provided which present valid data to the output bus with a latency of 2 clock cycles. Features Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . .40MSPS 6.5 Bits at fIN = 1MHz Low Power at 40MSPS. . . . . . . . . . . . . . . . . . . . . 100mW Power Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 8mW Wide Full Power Input Bandwidth. . . . . . . . . . . . . 250MHz Excellent Channel-to-Channel Isolation . . . . . . . . . >75dB Internal Digital Clamp Internal Voltage Reference Single Supply Voltage Operation . . . . . . . . . . . . . . . +3.3V TTL/CMOS Compatible Digital Inputs CMOS Compatible Digital Outputs . . ....