LAN91C96I

LAN91C96I Non-PCI Single-Chip Full Duplex Ethernet Controller Datasheet Product Features ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ Non-PCI Single-Chip Ethernet Controller Fully Supports Full Duplex Switched Ethernet Supports Enhanced Transmit Queue Management 6K Bytes of On-Chip RAM Supports IEEE 802.3 (ANSI 8802-3) Ethernet Standards Automatic Detection of TX/RX Polarity Reversal Enhanced Power Management Features Supports “Magic Packet” Power Management Technology Simultasking Early Transmit and Early Receive Functions Enhanced Early Transmit Function Receive Counter for Enhanced Early Receive Hardware Memory Management Unit Optional Configuration via Serial EEPROM Interface (Jumperless) Supports single 5V or 3.3V VCC Design Industrial temperature range of –40°C to 85°C Supports Mixed Voltage External PHY Designs1 Low Power CMOS Design 100 Pin QFP and TQFP (1.0mm body Thickness) Packages; Lead-Free Packages also available Pin Compatible with the LAN91C92 and LAN91C94 ƒ ƒ ƒ ƒ ƒ ƒ Integrated 10BASE-T Transceiver Functions: Driver and Receiver Link Integrity Test Receive Polarity Detection and Correction ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ Pipelined Data Path Handles Block Word Transfers for any Alignment High Performance Chained ("Back-to-Back") Transmit and Receive Pin Compatible with the LAN91C92 and the LAN91C94 in Local Bus Mode Dynamic Memory Allocation Between Transmit and Receive Flat Memory Structure for Low CPU Overhead Buffered Architecture, Insensitive to Bus Latencies (No Overruns/Un...