AD9866

Data Sheet Broadband Modem Mixed-Signal Front End AD9866 FEATURES Low cost 3.3 V CMOS MxFE for broadband modems 12-bit DAC 2×/4× interpolation filter 200 MSPS DAC update rate Integrated 23 dBm line driver with 19.5 dB gain control 12-bit, 80 MSPS ADC −12 dB to +48 dB low noise RxPGA (<2.5 nV/√Hz) Third order, programmable low-pass filter Flexible digital data path interface Half- and full-duplex operation Backward-compatible with AD9975 and AD9876 Various power-down/reduction modes Internal clock multiplier (PLL) 2 auxiliary programmable clock outputs Available in 64-lead chip scale package or bare die APPLICATIONS Powerline networking VDSL and HPNA FUNCTIONAL BLOCK DIAGRAM IOUT_P+ IOUT_P– PWR DWN MODE TXEN/SYNC TXCLK ADIO[11:6]/ Tx[5:0] ADIO[5:0]/ Rx[5:0] RXE/SYNC RXCLK AGC[5:0] SPI AD9866 12 2-4X TxDAC IAMP 0 TO –7.5dB 0 TO –12dB CLK SYN. 2M CLK MULTIPLIER 12 ADC 80MSPS 2-POLE LPF 1-POLE LPF 6 4 REGISTER CONTROL 0 TO 6dB – 6 TO 18dB –6 TO 24dB ∆ =...