SY100S811

Micrel, Inc. NOT RECOMMENDED FOR NEW DESIGNS SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL Precision Edge® Precision SEYd1g00eS®811 SY100S811 FEATURES s PECL version of popular ECLinPS E111 s Low skew s Guaranteed skew spec s VBB output s TTL enable input s Selectable TTL or PECL clock input s Single +5V supply s Differential internal design s Similar pin configuration to E111 s PECL I/O fully compatible with industry standard s Internal 75KΩ PECL input pull-down resistors s Available in 28-pin PLCC and SOIC packages BLOCK DIAGRAM EIN EIN TIN TEN 0 1 VBB Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 Q7 Q7 Q8 Q8 Precision Edge® DESCRIPTION The SY100S811 is a low skew 1-to-9 PECL differential driver designed for clock distribution in new, highperformance PECL systems. It accepts either a PECL clock input or a TTL input by using the TTL enable pin TEN. When the TTL enable pin is HIGH, the TTL input is enabled and the PECL input is disabled. When the enable pin is set LOW, the TTL input is disabled and the PECL input is enabled. The device is specifically designed and produced for low skew. The interconnect scheme and metal layout are carefully optimized for minimal gate-to-gate skew within the device. Wafer characterization and process control ensure consistent distribution of propagation delay from lot to lot. Since the S811 shares a common set of “basic” processing with the other members of the ECLinPS family, wafer characterization at the point of device personalization allows for ...