SY100S318

Micrel, Inc. 5-WIDE 5, 4, 4, 4, 2 OA/OAI GATE SY100S318 SY100S318 FEATURES DESCRIPTION s Max. propagation delay of 800ps s IEE min. of –55mA s Extended supply voltage option: VEE = –4.2V to –5.5V s Voltage and temperature compensation for improved noise immunity s Internal 75kΩ input pull-down resistors s 70% faster than Fairchild s 40% lower power than Fairchild s Function and pinout compatible with Fairchild F100K s Available in 28-pin PLCC package The SY100S318 is an ultra-fast 5-wide 5, 4, 4, 4, 2 OR/ AND gate with both true and complementary outputs, designed for use in high-performance ECL systems. The inputs on this device have 75kΩ pull-down resistors. BLOCK DIAGRAM D1a D2a D3a D4a D5a D1b D2b D3b D4b D1c D2c D3c D4c D1d D2d D3d D4d D1e D2e PIN NAMES Pin Dna – Dne O–O VEES VCCA Function Data Inputs (n = 1...5) Data Outputs VEE Substrate VCCO for ECL Outputs O O M9999-042307 [email protected] or (408) 955-1690 1 Rev.: I Amendment: /0 Issue Date: April 2007 Micrel, Inc. SY100S318 PACKAGE/ORDERING INFORMATION D1b D5a D4a VEES D3a D2a D1a Ordering Information 11 10 9 8 7 6 5 Part Number Package Operating Type Range Package Marking Lead Finish D2b D3b VEE VEES D4b D1c D2c 12 13 14 Top View 15 PLCC J28-1 16 17 18 4 3 2 1 28 27 26 19 20 21 22 23 24 25 O O VCCA VCC VCC D2e D1e SY100S318JC SY100S318JCTR(1) SY100S318JZ(2) J28-1 J28-1 J28-1 SY100S318JZTR(1, 2) J28-1 Notes: Commercial Commercial Commercial Commercial SY100S318JC SY100S318JC...