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ST72262Gx Dataheets PDF



Part Number ST72262Gx
Manufacturers ST Microelectronics
Logo ST Microelectronics
Description (ST72260Gx - ST72264Gx) 8-BIT MCU
Datasheet ST72262Gx DatasheetST72262Gx Datasheet (PDF)

ST72260Gx, ST72262Gx, ST72264Gx 8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES Memories – 4 K or 8 Kbytes Program memory: ROM or Single voltage extended Flash (XFlash) with read-out protection write protection and InCircuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention: 20 years at 55°C. www.DataSheet4U.com – 256 bytes RAM ■ Clock, Reset and Supply Management – Enhanced reset system – Enhanced low.

  ST72262Gx   ST72262Gx



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ST72260Gx, ST72262Gx, ST72264Gx 8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES Memories – 4 K or 8 Kbytes Program memory: ROM or Single voltage extended Flash (XFlash) with read-out protection write protection and InCircuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention: 20 years at 55°C. www.DataSheet4U.com – 256 bytes RAM ■ Clock, Reset and Supply Management – Enhanced reset system – Enhanced low voltage supply supervisor (LVD) with 3 programmable levels and auxiliary voltage detector (AVD) with interrupt capability for implementing safe power-down procedures – Clock sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock – PLL for 2x frequency multiplication – Clock-out capability – 4 Power Saving Modes: Halt, Active Halt,Wait and Slow ■ Interrupt Management – Nested interrupt controller – 10 interrupt vectors plus TRAP and RESET – 22 external interrupt lines (on 2 vectors) ■ 22 I/O Ports – 22 multifunctional bidirectional I/O lines – 20 alternate function lines – 8 high sink outputs ■ 4 Timers – Main Clock Controller with Real time base and Clock-out capabilities – Configurable watchdog timer ■ SDIP32 LFBGA 6x6mm SO28 ■ ■ ■ ■ – Two 16-bit timers with: 2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes 3 Communication Interfaces – SPI synchronous serial interface – I2C multimaster interface (SMBus V1.1 Compliant) – SCI asynchronous serial interface 1 Analog peripheral – 10-bit ADC with 6 input channels Instruction Set – 8-bit data manipulation – 63 basic instructions with illegal opcode detection – 17 main addressing modes – 8 x 8 unsigned multiply instruction Development Tools – Full hardware/software development package Device Summary Features Program memory - bytes RAM (stack) - bytes Peripherals Operating Supply CPU Frequency Operating Temperature Packages ST72260G1 4K Watchdog timer, RTC, Two16-bit timers, SPI ST72262G1 ST72262G2 ST72264G1 4K 8K 4K ST72264G2 8K 256 (128) Watchdog timer, RTC, Watchdog timer, RTC, Two 16-bit timers, SPI, ADC Two 16-bit timers, SPI, SCI, I2C, ADC 2.7 V to 5.5 V Up to 8 MHz (with oscillator up to 16 MHz) PLL 4/8 MHz 0° C to +70° C / -40° C to +85° C -40° C to +85° C -40° C to +85° C SO28 / SDIP32 SO28 / SDIP32 LFBGA Rev. 3 June 2005 1/172 1 Table of Contents 1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 REGISTER & MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 FLASH PROGRAM MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.2 4.3 4.4 4.5 4.6 4.7 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 PROGRAMMING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 ICC INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 MEMORY PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 RELATED DOCUMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 www.DataSheet4U.com 5 CENTRAL PROCESSING UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2 5.3 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 CPU REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 SUPPLY, RESET AND CLOCK MANAGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.1 PHASE LOCKED LOOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.2 6.3 6.4 MULTI-OSCILLATOR (MO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 RESET SEQUENCE MANAGER (RSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SYSTEM INTEGRITY MANAGEMENT (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7 INTERRUPTS . . . . . . . . . ..


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