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CDP1833C

Part Number	CDP1833C
Manufacturer	Intersil
Description	CMOS 7-Bit Latch and Decoder Memory Interface
Published	Apr 7, 2007
Detailed Description	www.DataSheet4U.com CDP1883, CDP1883C March 1997 CMOS 7-Bit Latch and Decoder Memory Interfaces Description The CDP188...
Datasheet	CDP1833C PDF File

Overview

www.
DataSheet4U.
com CDP1883, CDP1883C March 1997 CMOS 7-Bit Latch and Decoder Memory Interfaces Description The CDP1883 is a CMOS 7-bit memory latch and decoder circuit intended for use in CDP1800-series microprocessor systems.
It can serve as a direct interface between the multiplexed address bus of this system and up to four 8K x 8-bit memories to implement a 32K-byte memory system.
With four 4K x 8-bit memories, a 16K-byte system can be decoded.
The device is also compatible with non-multiplexed address bus microprocessors.
By connecting the clock input to VDD, the latches are in the data-following mode and the decoded outputs can be used in general-purpose memory-system applications.
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