W83176R-732

www.DataSheet4U.com W83176R-732 Data Sheet WINBOND 2 DIMM DDR ZERO DELAY BUFFER FOR SIS CHIPSET -I- Publication Release Date: April 13, 2005 Revision 1.1 W83176R-732 Table of Contents1. 2. 3. 4. 5. GENERAL DESCRIPTION ..........................................................................................................1 FEATURES ..................................................................................................................................1 PIN CONFIGURATION ................................................................................................................1 BLOCK DIAGRAM .......................................................................................................................2 PIN DESCRIPTION......................................................................................................................2 5.1 5.2 6. 6.1 6.2 7. 7.1 7.2 7.3 7.4 8. 8.1 8.2 8.3 9. 10. 11. 12. Clock Outputs ........................................................................................................................... 3 Power Pins................................................................................................................................ 3 Register 5: Output Control (1 = Active, 0 = Inactive) (Default = FFh)..................................... 4 Register 6: Output Control (1 = active, 0 = inactive) (Default = FFh) ..................................... 4 Block Write Protocol ........................................