SY10ELT22

www.DataSheet4U.com Micrel, Inc. DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR SY10ELT22 SY100ELT22 SY10ELT22 SY100ELT22 FEATURES ■ ■ ■ ■ ■ ■ 300ps typical propagation delay <100ps output-to-output skew Differential PECL outputs PNP TTL inputs for minimal loading Flow-through pinouts Available in 8-pin SOIC package DESCRIPTION The SY10/100ELT22 are dual TTL-to-differential PECL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT22 makes it ideal for applications which require the tranlation of a clock and a data signal. The ELT22 is available in both ECL standards: the 10ELT is compatible with positive ECL 10H logic levels, while the 100ELT is compatible with positive ECL 100K logic levels. PIN NAMES Pin Qn Dn VCC GND Function Differential PECL Outputs TTL Inputs +5.0V Supply Ground M9999-120705 [email protected] or (408) 955-1690 Rev.: G Amendment: /0 1 Issue Date: December 2005 Micrel SY10ELT22 SY100ELT22 PACKAGE/ORDERING INFORMATION Ordering Information(1) Q0 1 /Q0 2 PECL TTL 8 VCC 7 D0 6 D1 5 GND Part Number SY10ELT22ZC SY10ELT22ZCTR(2) SY100ELT22ZC SY100ELT22ZCTR(2) SY10ELT22ZG(3) SY10ELT22ZGTR(2, 3) SY100ELT22ZG(3) SY100ELT22ZGTR(2, 3) Package Type Z8-1 Z8-1 Z8-1 Z8-1 Z8-1 Z8-1 Z8-1 Z8-1 Operating Range Commercial Commercial Commercial Commercial Industrial Industrial Industrial Industrial Package Marking HEL22 HEL22 XEL22 XEL22 HE...