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MT9161B Dataheets PDF



Part Number MT9161B
Manufacturers MITEL
Logo MITEL
Description ISO2-CMOS 5 Volt Multi-Featured Codec
Datasheet MT9161B DatasheetMT9161B Datasheet (PDF)

www.DataSheet4U.com ISO2-CMOS MT9160B/61B 5 Volt Multi-Featured Codec (MFC) Advance Information Features • • Improved idle channel noise over MT9160 MT9161 version features a delayed framing pulse in SSI and ST-BUS modes to facilitate cascaded devices Programmable µ-Law/A-Law Codec and Filters Programmable ITU-T G.711/sign-magnitude coding Programmable transmit, receive and side-tone gains Fully differential interface to handset transducers - including 300 ohm receiver driver Flexible digital i.

  MT9161B   MT9161B


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www.DataSheet4U.com ISO2-CMOS MT9160B/61B 5 Volt Multi-Featured Codec (MFC) Advance Information Features • • Improved idle channel noise over MT9160 MT9161 version features a delayed framing pulse in SSI and ST-BUS modes to facilitate cascaded devices Programmable µ-Law/A-Law Codec and Filters Programmable ITU-T G.711/sign-magnitude coding Programmable transmit, receive and side-tone gains Fully differential interface to handset transducers - including 300 ohm receiver driver Flexible digital interface including ST-BUS/SSI Serial microport or default controllerless mode Single 5 volt supply Low power operation ITU-T G.714 compliant DS5145 ISSUE 3 March 1999 • • • • • • • • • Ordering Information MT9161BE 24 Pin Plastic DIP(600 mil) MT9160BE 24 Pin Plastic DIP(600 mil) MT9161BS 24 Pin SOIC MT9160BS 20 Pin SOIC MT9161BN 24 Pin SSOP MT9160BN 20 Pin SSOP -40°C to +85°C Description The MT9160B/61B 5V Multi-featured Codec incorporates a built-in Filter/Codec, gain control and programmable sidetone path as well as on-chip anti-alias filters, reference voltage and bias source. The device supports both ITU-T and sign-magnitude A-Law and µ-Law requirements. Complete telephony interfaces are provided for connection to handset transducers. Internal register access is provided through a serial microport compatible with various industry standard micro-controllers. The device also supports controllerless operation utilizing the default register conditions. The MT9160B/61B is fabricated in Mitel's ISO2-CMOS technology ensuring low power consumption and high reliability. Applications • • • Digital telephone sets Cellular radio sets Local area communications stations VSSD VDD VSSA VBias VRef FILTER/CODEC GAIN MENCODER DECODER 7dB -7dB Transducer Interface M+ HSPKR + HSPKR - Din Timing Dout STB/F0i CLOCKin STBd/FOod (MT9161B only) Flexible Digital Interface ST-BUS C&D Channels Serial Microport A/µ/IRQ PWRST IC CS DATA1 DATA2 SCLK Figure 1 - Functional Block Diagram 79 MT9160B/61B MT9160BS/BN VBias VRef NC PWRST IC A/µ/IRQ VSSD CS NC SCLK DATA1 DATA2 Advance Information MT9160BE 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 M+ MVSSA NC HSPKR + HSPKR VDD CLOCKin NC STB/F0i Din Dout VBias VRef NC PWRST IC A/µ/IRQ VSSD CS NC SCLK DATA1 DATA2 MT9161BE/BS/BN 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 M+ MVSSA NC HSPKR + HSPKR VDD CLOCKin STBd/FOod STB/F0i Din Dout VBias VRef PWRST IC A/µ/IRQ VSSD CS SCLK DATA1 DATA2 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 M+ MVSSA HSPKR + HSPKR VDD CLOCKin STB/F0i Din Dout 20 PIN SOIC/SSOP 24 PIN PDIP 24 PIN PDIP/SOIC/SSOP Figure 2 - Pin Connections Pin Description Pin # Pin # 20 Pin 24 Pin 1 2 3 4 5 1 2 4 5 6 Name VBias VRef PWRST IC A/µ/IRQ Description Bias Voltage (Output). (VDD/2) volts is available at this pin for biasing external amplifiers. Connect 0.1 µF capacitor to VSSA,Connect 1 µF capacitor to Vref. Reference Voltage for Codec (Output). Nominally [(VDD/2)-1.9] volts. Used internally. Connect 0.1 µF capacitor to VSSA,Connect 1 µF capacitor to VBias. Power-up Reset (Input). CMOS compatible input with Schmitt Trigger (active low). Resets internal state of device. Internal Connection. Tie externally to VSSD for normal operation. A/µ - When internal control bit DEn = 0 this CMOS level compatible input pin governs the companding law used by the filter/Codec; µ-Law when tied to VSSD and A-Law when tied to VDD. Logically OR’ed with A/µ register bit. IRQ - When internal control bit DEn = 1 this pin becomes an open-drain interrupt output signalling valid access to the D-Channel registers in ST-BUS mode. Digital Ground. Nominally 0 volts. Chip Select (Input). This input signal is used to select the device for microport data transfers. Active low. CMOS level compatible. Serial Port Synchronous Clock (Input). Data clock for microport. CMOS level compatible. Bidirectional Serial Data. Port for microprocessor serial data transfer. In Motorola/ National mode of operation, this pin becomes the data transmit pin only and data receive is performed on the DATA 2 pin. Input CMOS level compatible. Serial Data Receive. In Motorola/National mode of operation, this pin is used for data receive. In Intel mode, serial data transmit and receive are performed on the DATA 1 pin and DATA 2 is disconnected. Input CMOS level compatible. Data Output. A high impedance three-state digital output for 8 bit wide channel data being sent to the Layer 1 transceiver. Data is shifted out via this pin concurrent with the rising edge of the bit clock during the timeslot defined by STB, or according to standard ST-BUS timing. Data Input. A digital input for 8 bit wide channel data received from the Layer 1 transceiver. Data is sampled on the falling edge of the bit clock during the timeslot defined by STB, or according to standard ST-BUS timing. Input level is CMOS compatible. 6 7 8 9 7 8 10 11 VSSD CS SCLK DATA 1 10 12 DATA 2 11 13 Dout 12 14 Din .


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