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CAT1320, CAT1321
Supervisory Circuits with I2C Serial 32K CMOS EEPROM FEATURES
I Precision power supply voltage monitor I 3.0V to 5.5V operation I Low power CMOS technology I 64-Byte page write buffer I 1,000,000 Program/Erase cycles I 100 year data retention
H
GEN FR ALO
EE
LE
A D F R E ETM
— 5V, 3.3V and 3V systems - +5.0V (+/- 5%, +/- 10%) - +3.3V (+/- 5%, +/- 10%) - +3.0V (+/- 10%)
I Active low reset, CAT1320 I Active high reset, CAT1321 I Valid reset guaranteed at VCC=1V I 400kHz I2C bus
I 8-pin DIP, SOIC, TSSOP and TDFN packages I Industrial temperature range
DESCRIPTION
The CAT1320 and CAT1321 are complete memory and supervisory solutions for microcontroller-based systems. A 32kbit serial EEPROM memory and a system power supervisor with brown-out protection are integrated together in low power CMOS technology. Memory interface is via a 400kHz I2C bus. active, preventing the system microcontroller, ASIC or peripherals from operating. Reset signals become inactive typically 200 ms after the supply voltage exceeds the reset threshold level. With both active high and low reset options, interface to microcontrollers and other ICs is simple. In addition, the RESET (CAT1320) pin can be used as an input for push-button manual reset capability.
The CAT1320 provides a precision VCC sense circuit and drives an open drain output, RESET low whenever The CAT1320/21 memory features a 64-byte page. In addition, hardware data protection is provided by a VCC VCC falls below the reset threshold voltage. sense circuit that prevents writes to memory whenever VCC The CAT1321 provides a precision VCC sense circuit falls below the reset threshold or until VCC reaches the reset that drives an open drain output, RESET high whenever threshold during power up. VCC falls below the reset threshold voltage. Available packages include an 8-pin DIP, SOIC, TSSOP The power supply monitor and reset circuit protect and 4.9 x 3mm TDFN. memory and system controllers during power up/down and against brownout conditions. Five reset threshold voltages support 5V, 3.3V and 3V systems. If power supply voltages are out of tolerance reset signals become
PIN CONFIGURATION
PDIP (P, L) SOIC (J, W)
A0 1 A1 2 A2 3 VSS 4
A0 1 A1 2 A2 3 VSS 4 CAT1321
TSSOP (U, Y)
A0 1 A1 2 A2 3 VSS 4 CAT1320 8 VCC 7 RESET 6 SCL 5 SDA
TDFN PACKAGE: 4.9MM X 3MM (RD2, ZD2)
A0 A1 A2 VSS
1 2 3 4 8 7
CAT1320
8 VCC 7 RESET 6 SCL 5 SDA
VCC RESET SCL SDA
CAT1320
6 5
8 VCC 7 RESET 6 SCL 5 SDA
A0 1 A1 2 A2 3 VSS 4 CAT1321
8 VCC 7 RESET 6 SCL 5 SDA
A0 A1 A2 VSS
1 2 3 4
8 7
VCC RESET SCL SDA
CAT1321
6 5
© 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
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Doc. No. 20585, Rev. 00
CAT1320, CAT1321
Advance Information
BLOCK DIAGRAM — CAT1320, CAT1321
EXTERNAL LOAD DOUT ACK VCC VSS WORD ADDRESS BUFFERS COLUMN DECODERS SENSE AMPS SHIFT REGISTERS
Threshold Voltage Options
Part Dash Minimum Number Threshold
-45 -42 -30 -28 -25 4.50 4.25 3.00 2.85 2.55
Maximum Threshold
4.75 4.50 3.15 3.00 2.70
SDA
START/STOP LOGIC 32kbit EEPROM
XDEC CONTROL LOGIC
OPERATING TEMPERATURE RANGE
Industrial -40˚C to 85˚C
DATA IN STORAGE
HIGH VOLTAGE/ TIMING CONTROL RESET Controller Precision
Vcc Monitor
STATE COUNTERS SLAVE ADDRESS COMPARATORS
SCL A0 A1 A2
RESET (CAT1320) RESET (CAT1321)
PIN FUNCTIONS Pin Name
RESET VSS SDA SCL RESET VCC
Function
Active Low Reset Input/Output (CAT1320) Ground Serial Data/Address Clock Input Active High Reset Output (CAT1321) Power Supply
PIN DESCRIPTION
RESET/RESET: RESET OUTPUTS These are open-drain pins and RESET can also be used as a manual reset trigger input. By forcing a reset condition on the pin the device will initiate and maintain a reset condition. The RESET pin must be connected through a pull-down resistor and the RESET pin must be connected through a pull-up resistor. SDA: SERIAL DATA ADDRESS The bidirectional serial data/address pin is used to transfer all data into and out of the device. The SDA pin is an open drain output and can be wire-ORed with other open drain or open collector outputs. SCL: SERIAL CLOCK Serial clock input. A0, A1, A2: DEVICE ADDRESS INPUTS When hardwired, up to eight CAT1320/21 devices may be addressed on a single bus system (refer to Device Addressing). When the pins are left unconnected, the default values are zeros.
Doc. No. 25085, Rev. 00
2
Advance Information
CAT1320, CAT1321
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. Note: (1) Output shorted for no more than one second. No more than one output shorted at a time.
ABSOLUTE MAXIMUM RATINGS
Temperature Under Bias ................