LAN91C111

www.DataSheet4U.com LAN91C111 10/100 Non-PCI Ethernet Single Chip MAC + PHY PRODUCT FEATURES ■ ■ ■ ■ ■ Datasheet ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Single Chip Ethernet Controller Dual Speed - 10/100 Mbps Fully Supports Full Duplex Switched Ethernet Supports Burst Data Transfer 8 Kbytes Internal Memory for Receive and Transmit FIFO Buffers Enhanced Power Management Features Optional Configuration via Serial EEPROM Interface Supports 8, 16 and 32 Bit CPU Accesses Internal 32 Bit Wide Data Path (Into Packet Buffer Memory) Early TX, Early RX Functions Built-in Transparent Arbitration for Slave Sequential Access Architecture Flat MMU Architecture with Symmetric Transmit and Receive Structures and Queues 3.3V Operation with 5V Tolerant IO Buffers (See Pin List Description for Additional Details) Single 25 MHz Reference Clock for Both PHY and MAC External 25Mhz-output pin for an external PHY supporting PHYs physical media. Low Power CMOS Design Supports Multiple Embedded Processor Host Interfaces — — — — — — ARM SH Power PC Coldfire 680X0, 683XX MIPS R3000 ■ ■ ■ ■ 3.3V MII (Media Independent Interface) MAC-PHY Interface Running at Nibble Rate MII Management Serial Interface 128 Pin QFP package; green, lead-free package also available. 128 Pin TQFP package, 1.0 mm height; green, leadfree package also available. Industrial Temperature Range from -40°C to 85°C (LAN91C111i only) Network Interface ■ Fully Integrated IEEE 802.3/802.3u-100Base-TX/ 10Base-T Physical Layer ■ Auto Neg...