Clock Recovery and Data Retiming IC
www.DataSheet4U.com
19-2362; Rev 1; 3/02
2.5Gbps, Low-Power, +3.3V Clock Recovery and Data Retiming IC
General Descrip...
Description
www.DataSheet4U.com
19-2362; Rev 1; 3/02
2.5Gbps, Low-Power, +3.3V Clock Recovery and Data Retiming IC
General Description
The MAX3875A is a compact, low-power clock recovery and data retiming IC for 2.488Gbps SDH/SONET applications. The fully integrated phase-locked loop recovers a synchronous clock signal from the serial NRZ data input, which is retimed by the recovered clock. Differential PECL-compatible outputs are provided for both clock and data signals, and an additional 2.488Gbps serial input is available for system loopback diagnostic testing. The device also includes a TTLcompatible loss-of-lock (LOL) monitor. The MAX3875A is designed for both section-regenerator and terminal-receiver applications in OC-48/STM-16 transmission systems. Its jitter performance exceeds all of the SONET/SDH specifications. This device operates from a single +3.3V to +5.0V supply over a -40°C to +85°C temperature range. The typical power consumption is only 400mW with a +3.3V supply. It is available in a 32-pin TQFP package, as well as in die form.
Features
o Exceeds ANSI, ITU, and Bellcore SONET/SDH Regenerator Specifications o 400mW Power Dissipation (at +3.3V) o Clock Jitter Generation: 0.003UIRMS o Single +3.3V or +5V Power Supply o Fully Integrated Clock Recovery and Data Retiming o Additional High-Speed Input Facilitates System Loopback Diagnostic Testing o Tolerates >2000 Consecutive Identical Digits o Loss-of-Lock Indicator o Differential PECL-Compatible Data and Clock Outputs
...
Similar Datasheet