KM641001A

www.DataSheet4U.com PRELIMINARY CMOS SRAM KM641001A Document Title 256Kx 4 High Speed Static RAM(5V Operating), Evolutionary Pin Out. Operated at Commercial Temperature Range. Revision History Rev. No. Rev. 0.0 Rev. 1.0 History Initial release with Design Target. Release to Preliminary Data Sheet. 1.1. Replace Design Target to Preliminary Release to final Data Sheet. 2.1. Delete Preliminary Update D.C and A.C parameters. 3.1. Update D.C parameters Previous spec. Items (15/17/20ns part) Icc 190/180/170mA Isb 30mA Isb1 10mA 3.2. Update A.C parameters Previous spec. Items (15/17/20ns part) tCW 12/12/13ns tAW 12/12/13ns tWP1(OE=H) 12/12/13ns tDW 8/9/10ns Draft Data Jan. 18th, 1995 Apr. 22th, 1995 Remark Design Target Preliminary Rev. 2.0 Feb. 29th, 1996 Final Rev. 3.0 Jul. 16th, 1996 Updated spec. (15/17/20ns part) 145/145/140mA 25mA 8mA Updated spec. (15/17/20ns part) 10/11/12ns 10/11/12ns 10/11/12ns 7/8/9ns Jun. 2nd, 1997 Final Rev. 4.0 Update D.C and A.C parameters 4.1. Update D.C and A.C parameters. Previous spec. Updated spec. Items (15/17/20ns part) (15/17/20ns part) Icc 145/145/140mA 125/125/120mA tOW 3/4/5ns 3/3/3ns 4.2. Add the test condition for VOH1 with VCC=5V±5% at 25°C 4.3. Add timing diagram to define tWP as ″(Timing Wave Form of Write Cycle(CS=Controlled)″ 5.1. Delete 17ns Part Final Rev. 5.0 Feb. 25th, 1998 Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change th...