KL5KUSB200

www.DataSheet4U.com KL5KUSB200 USB2.0 Transceiver General Description The Kawasaki USB 2.0 Compliant Transceiver is the interface between the high performance USB serial bus and the 16-bit SIE bus. The high-speed analog interface and the digital serial bit processing feature of the USB 2.0 transceiver enables a highly integrated USB 2.0 device. The transceiver is controlled by input signals from the SIE bus which is synchronized with the 30MHz clock output. The Kawasaki Transceiver also provides output signals to monitor the USB bus status. The Kawasaki Transceiver, SIE, and logic design are combined to create Kawasaki's USB chip solutions for peripheral devices or can be used as IP with our ASIC technology. Features USB 2.0 compliant transceiver UTMI based design (USB 2.0 Transceiver Macro cell Interface) Generates 48MHz to 480MHz input Full Speed / High Speed capabilities Supports “Chirp” for High Speed recognition Support Reset and Suspend Operational mode selection Status signals for monitoring USB bus Optional CRC verification/generation logic Mode bit expansion for device test 16 bit Bi-directional SIE bus TX data packet abort ASIC IP supports High speed SIE with ASIC IP 80 pin LQFP package (12 mm2) Block Diagram USB Bus HSDP HSDM SIE Bus High Speed Front end HS DLL EBUF Shared Logic SIE Interface Control Signals Status CKOUT SIE_Data RPU_ENA FSDP FSDM Full Speed Front end DPLL External 48MHz Clk Clock Generator US: Kawasaki LSI ,...