ICS557-08

www.DataSheet4U.com ICS557-08 2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS Description The ICS557-08 is a 2:1 multiplexer chip that allows the user to select one of the two HCSL (Host Clock Signal Level) or LVDS input pairs and fan out to one pair of differential HCSL or LVDS outputs. This chip is suited especially for PCI-Express applications, where there is a need to select the PCI-Express clock either locally from the PCI-E card or from the motherboard. Features Packaged in 16-pin TSSOP Available in Pb (lead) free package Operating voltage of 3.3 V Low power consumption Input clock frequency of up to 200 MHz for HCSL and up to 100 MHz for LVDS Jitter 60 ps (cycle-to-cycle) Block Diagram VDD 3 OE IN1 IN1 IN2 IN2 CLK MUX 2 to 1 CLK 3 SEL GND PD Rr (IREF) MDS 557-08 C I n t e gra te d C i r c u i t S y s t e m s ● 1 525 Race Stre et, San Jo se, CA 9 5126 ● Revision 021606 te l (40 8) 2 97-12 01 ● w w w. i c st . c o m ICS557-08 2:1 Multiplexer Chip for PCI-Express Pin Assignment VDD IN1 IN1 PD IN2 IN2 OE GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SEL CLK CLK GND GND VDD VDD IREF Select Table SEL 0 1 Input Pair selected IN2/ IN2 IN1/ IN1 16-pin (173 mil) TSSOP Pin Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name VDD IN1 IN1 PD IN2 IN2 OE GND IREF VDD VDD GND GND CLK CLK SEL Pin Type Power Input Input Input Input Input Input Power Output Power Power Power Power Output Output Input HCSL/LVDS true input signal 1. Pin Description Connect to ...