ICS553

www.DataSheet4U.com ICS553 LOW SKEW 1 TO 4 CLOCK BUFFER Description The ICS553 is a low skew, single input to four output, clock buffer. Part of ICS’ Clock BlocksTM family, this is our lowest skew, small clock buffer. See the ICS552-02 for a 1 to 8 low skew buffer. For more than 8 outputs see the MK74CBxxx Buffalo TM series of clock drivers. ICS makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features Extremely low skew outputs (50ps maximum) Packaged in 8 pin SOIC Low power CMOS technology Operating Voltages of 2.5 to 5V Output Enable pin tri-states outputs 5V tolerant input clock Block Diagram Q0 Q1 IC LK Q2 Q3 O utput E nable MDS 553 B In tegr ated C ir cu it S yst ems q 1 5 25 Ra ce Str eet, San Jose, C A 95 126 q Revision 052501 tel ( 408) 2 95-9 800 q www. i c s t. c om ICS553 LOW SKEW 1 TO 4 CLOCK BUFFER Pin Assignment VDD Q0 Q1 GND 1 2 3 4 8 7 6 5 OE Q3 Q2 I CLK 8 Pi n (150 mi l) SOIC Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name VDD Q0 Q1 GND ICLK Q2 Q3 OE Pin Type Power Output Output Power Input Output Output Input Clock Output 0 Clock Output 1 Ground Pin Description Connect to +2.5V, +3.3V or +5.0V. Clock Input. 5V tolerant input. Clock Output 2 Clock Output 3 Output Enable. Tri-states outputs when low. External Components A minimum number of external components are required for proper operation. A decoupling capacitor of 0...