ZL30119

ZL30119 SONET/SDH OC-48/OC-192 Line Card Synchronizer Data Sheet Features Ordering Information June 2006 Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-253-CORE and ITU-T G.813 Internal APLL provides standard output clock frequencies up to 622.08 MHz that meet jitter requirements for interfaces up to OC-192/STM-64 Programmable output synthesizers (P0, P1) generate clock frequencies from any multiple of 8 kHz up to 77.76 MHz in addition to 2 kHz Provides two DPLLs which are independently configurable through a serial peripheral interface DPLL1 provides all the features necessary for generating SONET/SDH compliant clocks including automatic hitless reference switching, automatic mode selection (locked, free-run, holdover), and selectable loop bandwidth DPLL2 provides a comprehensive set of features for generating derived output clocks and other general purpose clocks ZL30119GGG 100 Pin CABGA Trays ZL30119GGG2 100 Pin CABGA* Trays *Pb Free Tin/Silver/Copper -40oC to +85oC Provides 8 reference inputs which support clock frequencies with any multiples of 8 kHz up to 77.76 MHz in addition to 2 kHz Provides 3 sync inputs for output frame pulse alignment Generates several styles of output frame pulses with selectable pulse width, polarity, and frequency Configurable input to output delay, and output to output phase alignment Flexible input re...