NXP Semiconductors
LPC3180
16/32-bit ARM microcontroller with external memory interface
Table 2. Pin allocation table …continued
Pin Symbol
Pin Symbol
Row M
1 GPO_08
2 GPO_10
21 VSS_SDRAM_04
22 RAM_D[10]
Row N
1 GPO_13
2 GPO_16
21 RAM_D[07]
22 VSS_SDRAM_05
Row P
1 GPO_18
2 GPO_22/U7_HRTS
21 RAM_D[04]
22 VDD_SDRAM18_05
Row R
1 GPIO_01
2 GPIO_05
21 VSS_CORE_06
22 VSS_SDRAM_06
Row T
1 GPIO_03/
KEY_ROW7
2 GPIO_04
21 RAM_CLKIN
22 RAM_D[01]
Row U
1 i.c.[1]
2 MS_DIO1
Pin
3
23
3
23
3
23
3
23
3
23
3
21 RAM_RAS_N
Row V
1 SPI1_DATIN
21 RAM_DQM[2]
Row W
1 SPI1_DATIO
21 RAM_A[14]
Row Y
1 MS_BS
21 VDD_SDRAM18_07
Row AA
1 MS_SCLK
22
2
22
2
22
2
22
2
VDD_SDRAM18_06 23
SPI2_DATIO
RAM_WR_N
3
23
MS_DIO0
VSS_SDRAM_07
3
23
MS_DIO2
RAM_A[10]
3
23
VDD_CORE12_01 3
5 VSS_CORE_07
6 VSS
7
Symbol
GPO_07
RAM_D[14]
VSS_IO28_03
RAM_D[11]
GPO_12
RAM_D[08]
VSS_CORE_05
RAM_D[05]
GPIO_00
RAM_D[00]
GPIO_02/
KEY_ROW6
RAM_CLK
SPI2_CLK
RAM_CAS_N
SPI1_CLK
RAM_DQM[1]
GPO_04
RAM_A[12]
GPI_06/
HSTIM_CAP
USB_ATX_INT_N
9 I2C2_SDA
13 i.c.[1]
17 FLASH_RD_N
21 RAM_A[05]
Row AB
1 GPO_11
5 VSS
10 VSS_CORE_08
14 i.c.[1]
18 VSS_SDRAM_10
22 VSS_SDRAM_08
11 GPI_03
15 VDD_IO18_02
19 VDD_IO18_01
23 RAM_A[09]
2 VSS
3 TST_CLK2
6 VDD_CORE12_07 7 USB_SE0_VM/
U5_TX
LPC3180_2
Preliminary data sheet
Rev. 02 — 15 February 2007
Pin Symbol
4 GPO_06
24 RAM_D[12]
4 GPO_09
24 RAM_D[09]
4 GPO_21/U4_TX
24 RAM_D[06]
4 GPO_15
24 RAM_D[03]
4 SPI2_DATIN
24 RAM_D[02]
4 VDD_IO28_01
24 RAM_CKE
4 MS_DIO3
24 RAM_CS_N
4 VSS
24 RAM_DQM[3]
4 I2C1_SCL
24 RAM_DQM[0]
4 VDD1828
8 USB_DAT_VP/
U5_RX
12 VDD_CORE12_06
16 FLASH_ALE
20 VDD_SDRAM18_09
24 RAM_A[13]
4 VSS
8 VSS_IO18_04
© NXP B.V. 2007. All rights reserved.
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