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BUK714R1-40BT Dataheets PDF



Part Number BUK714R1-40BT
Manufacturers NXP
Logo NXP
Description (BUK714R1-40BT / BUK794R1-40BT) TrenchMOS standard level FET
Datasheet BUK714R1-40BT DatasheetBUK714R1-40BT Datasheet (PDF)

www.DataSheet4U.com BUK71/794R1-40BT TrenchMOS™ standard level FET Rev. 01 — 4 November 2004 Product data 1. Product profile 1.1 Description N-channel enhancement mode field-effect power transistor in a plastic package using Philips High-Performance Automotive (HPA) TrenchMOS™ technology. The devices include TrenchPLUS diodes for over-temperature protection. Product availability: BUK714R1-40BT in SOT426 (D2-PAK) BUK794R1-40BT in SOT263B (TO-220AB). 1.2 Features s Integrated temperature sensor s.

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www.DataSheet4U.com BUK71/794R1-40BT TrenchMOS™ standard level FET Rev. 01 — 4 November 2004 Product data 1. Product profile 1.1 Description N-channel enhancement mode field-effect power transistor in a plastic package using Philips High-Performance Automotive (HPA) TrenchMOS™ technology. The devices include TrenchPLUS diodes for over-temperature protection. Product availability: BUK714R1-40BT in SOT426 (D2-PAK) BUK794R1-40BT in SOT263B (TO-220AB). 1.2 Features s Integrated temperature sensor s Very low on-state resistance s Q101 compliant s 175 °C rated. 1.3 Applications s Electrical Power Assisted Steering s Motors, lamps and solenoids s 12 V loads s General purpose power switching. 1.4 Quick reference data s s RDSon = 3.4 mΩ (typ) VDS ≤ 40 V s ID ≤ 75 A s Ptot ≤ 272 W. 2. Pinning information Table 1: Pin 1 2 3 4 5 mb Pinning - SOT426 and SOT263B, simplified outline and symbol Simplified outline mb mb Description gate (g) anode (a) drain (d) cathode (k) source (s) mounting base; connected to drain (d) Symbol d a g 1 2 3 4 5 03nm72 s k Front view MBK127 1 5 SOT426 (D2-PAK) MBL263 SOT263B (TO-220AB) Philips Semiconductors BUK71/794R1-40BT TrenchMOS™ standard level FET 3. Limiting values Table 2: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 °C; VGS = 10 V; Figure 2 and 3 Tmb = 100 °C; VGS = 10 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM peak drain current total power dissipation storage temperature junction temperature reverse drain current (DC) peak reverse drain current Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 75 A; VDS ≤ 40 V; VGS = 10 V; RGS = 50 Ω; starting Tmb = 25 °C Human Body Model; C = 100 pF; R = 1.5 kΩ [1] [2] [1] [2] [2] Conditions RGS = 20 kΩ Min −55 −55 - Max 40 40 ±20 187 75 75 748 272 +175 +175 187 75 748 1.5 Unit V V V A A A A W °C °C A A A J Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C; Figure 1 Source-drain diode Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Electrostatic discharge Vesd Electrostatic discharge voltage; pins 1,3,5 4 kV [1] [2] Current is limited by power dissipation chip rating. Continuous current is limited by package. 9397 750 13954 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 — 4 November 2004 2 of 15 Philips Semiconductors BUK71/794R1-40BT TrenchMOS™ standard level FET 120 Pder (%) 03na19 200 ID (A) 150 03nm69 80 100 40 50 Capped at 75 A due to package 0 0 50 100 150 200 Tmb (°C) 0 0 50 100 150 200 Tmb (°C) P tot P der = ---------------------- × 100 % P ° tot ( 25 C ) VGS ≥ 10 V Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Continuous drain current as a function of mounting base temperature. 103 ID (A) 03nm68 limit RDSon = VDS/ ID tp = 10 µs 102 100 µs 1 ms Capped at 75 A due to package D.C. 10 ms 10 100 ms 1 10-1 1 10 VDS (V) 102 Tmb = 25 °C; IDM single pulse. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 13954 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 — 4 November 2004 3 of 15 Philips Semiconductors BUK71/794R1-40BT TrenchMOS™ standard level FET 4. Thermal characteristics Table 3: Rth(j-mb) Rth(j-a) Thermal characteristics Conditions Figure 4 Min Typ Max Unit 0.55 K/W thermal resistance from junction to mounting base thermal resistance from junction to ambient SOT263B (TO-220AB) SOT426 (D2-PAK) vertical in still air minimum footprint; mounted on a PCB 60 50 K/W K/W Symbol Parameter 4.1 Transient thermal impedance 1 Z th(j-mb) (K/W) 03ni64 δ = 0.5 10-1 0.2 0.1 0.05 0.02 10-2 P δ= tp T single shot tp T t 10-3 10-6 10-5 10-4 10-3 10-2 10-1 1 tp (s) 10 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration. 9397 750 13954 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 — 4 November 2004 4 of 15 Philips Semiconductors BUK71/794R1-40BT TrenchMOS™ standard level FET 5. Characteristics Table 4: Characteristics Tj = 25 °C unless otherwise specified Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V Tj = 25 °C Tj = −55 °C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 °C Tj = 175 °C Tj = −55 °C IDSS drain-source leakage current VDS = 40 V; VGS = 0 V Tj = 25 °C Tj = 175 °C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = ±20 V; VDS = 0 V VGS = 10 V; ID = 50 A; Figure 7 and 8 Tj = 25 °C Tj = 175 °C VF SF temperature sense diode forward voltage temperature sense diode temperature coefficient total gate charge gate-to-source charge gate-to-drain (Miller) charge input capacitance output.


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