AD9211

10-Bit, 200 MSPS/250 MSPS/300 MSPS, 1.8 V Analog-to-Digital Converter AD9211 06041-001 FEATURES SNR = 60.1 dBFS @ fIN up to 70 MHz @ 300 MSPS ENOB of 9.7 @ fIN up to 70 MHz @ 300 MSPS (−1.0 dBFS) SFDR = −80 dBc @ fIN up to 70 MHz @ 300 MSPS (−1.0 dBFS) Excellent linearity DNL = ±0.1 LSB typical INL = ±0.2 LSB typical LVDS at 300 MSPS (ANSI-644 levels) 700 MHz full power analog bandwidth On-chip reference, no external decoupling required Integrated input buffer and track-and-hold Low power dissipation 437 mW @ 300 MSPS—LVDS SDR mode 410 mW @ 300 MSPS—LVDS DDR mode Programmable input voltage range 1.0 V to 1.5 V, 1.25 V nominal 1.8 V analog and digital supply operation Selectable output data format (offset binary, twos complement, Gray code) Clock duty cycle stabilizer Integrated data capture clock APPLICATIONS Wireless and wired broadband communications Cable reverse path Communications test equipment Radar and satellite subsystems Power amplifier linearization GENERAL DES...