HDMP-0422

www.DataSheet4U.com Agilent HDMP-0422 Single Port Bypass Circuit with CDR & Data Valid Detection Capability for Fibre Channel Arbitrated Loops Data Sheet Features Supports 1.0625 GBd Fibre Channel operation Supports 1.25 GBd Gigabit Ethernet (GE) operation Single PBC/CDR in one package CDR location determined by choice of cable input/output Amplitude valid and data valid detection (Fibre channel rate only) on FM_NODE[0] input Equalizers on all inputs High-speed LVPECL I/O Buffered Line Logic (BLL) outputs (no external bias resistors required) 0.46 W typical power at VCC = 3.3 V 24 Pin, low-cost SSOP package Applications RAID, JBOD, BTS cabinets One 2:1 muxes One 1:2 buffers 1 ≥ N Gigabit serial buffer N ≥ 1 Gigabit serial mux Description The HDMP-0422 is a Single Port Bypass Circuit (PBC) with Clock and Data Recovery (CDR) capability included. This integrated circuit provides a low-cost, lowpower physical-layer solution for Fibre Channel Arbitrated Loop (FC-AL) disk array configurations. By using a PBC such as the HDMP0422, hard disks may be pulled out or swapped while other disks in the array are available to the system. A PBC consists of multiple 2:1 multiplexers daisy chained along with a CDR. Each port has two modes of operation: “disk in loop” and “disk bypassed.” When the “disk in loop” mode is selected, the loop goes into and out of the disk drive at that port. For example, data goes from the HDMP-0422’s TO_NODE[n]± differential output p...