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HT45R06 A/D Type 8-Bit OTP MCU
Technical Document
· Tools Information · FAQs · Application Note -
HA0003E HA0004E HA0005E HA0007E HA0049E
Communicating between the HT48 & HT46 Series MCUs and the HT93LC46 EEPROM HT48 & HT46 MCU UART Software Implementation Method Controlling the I2C bus with the HT48 & HT46 MCU Series Using the MCU Look Up Table Instructions Read and Write Control of the HT1380
Features
· Operating voltage: 2.2V~5.5V · HALT function and wake-up feature reduce power
(IDD<200mA, when fSYS=455kHz, VDD=+5V)
· Operating frequency: 400kHz~2MHz
consumption
· Up to 2ms instruction cycle with 2MHz system clock at
455kHz: VDD=2.2V~5.5V 1MHz: VDD=2.4V~5.5V 2MHz: VDD=3.3V~5.5V
· 13 bidirectional I/O lines (PA, PB0~PB3, PD0) · One interrupt input shared with an I/O line · 8-bit programmable timer/event counter with
VDD=5V
· 4-level subroutine nesting · 4 channels 8-bit resolution A/D converter · PA with wake-up function · Bit manipulation instruction · 14-bit table read instruction · 63 powerful instructions · All instructions in 1 or 2 machine cycles · Low voltage reset function · Fast start-up: < 5ms
overflow interrupt and 7-stage prescaler
· On-chip crystal and RC oscillator · Watchdog Timer · 1024´14 program memory · 64´8 data memory RAM · Supports PFD for sound generation
(fSYS=455kHz, the RES is connected to VDD)
· 18-pin DIP/SOP, 20-pin SSOP packages
General Description
The HT45R06 is an 8-bit high performance, RISC architecture microcontroller devices specifically designed for cost-effective multiple I/O control product applications. The advantages of low power consumption, I/O flexibility, timer functions, oscillator options, watchdog timer, buzzer driver, multi-channel A/D converter, Pulse Width Modulation function, HALT and wake-up functions, enhance the versatility of these devices to suit a wide range of A/D application possibilities such as security systems, smoke detectors and smart tags.
Rev. 1.00
1
May 24, 2005
HT45R06
Block Diagram
P A 5 /IN T
In te rru p t C ir c u it S T A C K P ro g ra m R O M P ro g ra m C o u n te r IN T C
T M R T M R C P A 3 /P F D
M U
P r e s c a le r X P A 4 /T M R
fS
Y S
P A 4
In s tr u c tio n R e g is te r
M P
M U
X
D A T A M e m o ry
W D T
M U
fS X
Y S
/4
W D T O S C
P D C P D In s tr u c tio n D e c o d e r A L U T im in g G e n e ra to r S h ifte r P A 3 , P A 5 C 1 S S D M U X
P o rt D
P D 0
4 -C h a n n e l A /D C o n v e rte r S T A T U S P B C P B P o rt B P B 0 /A N 0 ~ P B 3 /A N 3 P A 0 P A 3 P A 4 P A 5 P A 6 ~ P /P /T /IN , P A 2 F D M R T A 7
O S C 2
O S R E V D V S
P A C
P o rt A
A C C
L V R
P A
Pin Assignment
P A 3 /P F D 1 2 3 4 5 6 7 8 9 1 0 P A 3 /P F D 1 2 3 4 5 6 7 8 9 P A 2 P A 1 P A 0 P B 3 /A N 3 P B 2 /A N 2 P B 1 /A N 1 P B 0 /A N 0 V S S 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 P A 4 /T M R P A 5 /IN T P A 6 P A 7 O S C 2 O S C 1 V D D R E S P D 0 P A 2 P A 1 P A 0 P B 3 /A N 3 P B 2 /A N 2 P B 1 /A N 1 P B 0 /A .