UT62L25616

www.DataSheet4U.com  UTRON Rev. 1.1 256K X 16 BIT LOW POWER CMOS SRAM GENERAL DESCRIPTION The UT62L25616(I) is a 4,194,304-bit low power CMOS static random access memory organized as 262,144 words by 16 bits. The UT62L25616(I) operates from a single 2.7V ~ 3.6V power supply and all inputs and outputs are fully TTL compatible. The UT62L25616(I) is designed for low power system applications. It is particularly suited for use in high-density high-speed system applications. UT62L25616(I) FEATURES Fast access time : 55/70/100 ns CMOS Low operating power Operating current: 45/35/25mA (Icc max) Standby current: 20 uA(TYP.) L-version 3 uA(TYP.) LL-version Single 2.7V~3.6V power supply Operating temperature: Industrial : -40℃~85℃ All inputs and outputs TTL compatible Fully static operation Three state outputs Data retention voltage: 1.5V (min) Data byte control : LB (I/O1~I/O8) UB (I/O9~I/O16) Package : 44-pin 400mil TSOPⅡ 48-pin 6mm × 8mm TFBGA PIN DESCRIPTION SYMBOL A0 - A17 I/O1 - I/O16 CE WE OE LB UB VCC VSS NC DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Input Write Enable Input Output Enable Input Lower-Byte Control High-Byte Control Power Supply Ground No Connection FUNCTIONAL BLOCK DIAGRAM A0 A1 A2 A3 A4 A8 A13 A14 A15 A16 A17 I/O1 I/O16 ROW DECODER . MEMORY ARRAY VCC VSS . . 2048 Rows x 128 Columns x 16 bits . . . . I/O CONTROL . . . . . . . . COLUMN I/O CE WE OE LOGIC CONTROL COLUMN DECODER LB UB A9 A10 A11 A12 A5 A6 A7 UTRON TECHNOLOGY...