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LDMOS FIELD EFFECT TRANSISTOR
NE55410GR
N-CHANNEL SILICON POWER LDMOS FET FOR 2 W + 10 W VHF to L-BAND SINGLE-END POWER AMPLIFIER
DESCRIPTION
The NE55410GR is an N-channel enhancement-mode LDMOS FET designed for driver 0.1 to 2.6 GHz PA, such as, cellular base station amplifier, analog/digital TV-transmitters, and the other PA’s. This product has two different FET's on one die manufactured using our NEWMOS technology (our WSi gate lateral MOS FET), and its nitride surface passivation and quadruple layer aluminum silicon metalization offer a high degree of reliability.
FEATURES
• Two different FET’s (Q1 : Pout = 2 W, Q2 : Pout = 10 W) in one package • Over 25 dB gain available by connecting two FET’s in series : GL (Q1) = 13.5 dB TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz) : GL (Q2) = 11.0 dB TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz) • High 1 dB compression output power : PO (1 dB) (Q1) = 35.4 dBm TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz) : PO (1 dB) (Q2) = 40.4 dBm TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz) • High drain efficiency • Low intermodulation distortion • Single Supply (VDS : 3 V < VDS ≤ 30 V) • Excellent Thermal Stability • Surface mount type and Super low cost plastic package : 16-pin plastic HTSSOP • Integrated ESD protection • Excellent stability against HCI (Hot Carrier Injection) : ηd (Q1) = 52% TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz) : ηd (Q2) = 46% TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz) : IM3 (Q1) = −40 dBc TYP. (VDS = 28 V, IDset (Q1+Q2) = 120 mA, f = 2 132.5/2 147.5 MHz, Pout = 33 dBm (2 tones) )
APPLICATION
• Digital cellular base station PA : W-CDMA/GSM/D-AMPS/PDC/N-CDMA/PCS etc. • UHF-band TV transmitter PA
Caution Observe precautions when handling because these devices are sensitive to electrostatic discharge.
Document No. PU10542EJ02V0DS (2nd edition) Date Published June 2005 CP(K)
The mark shows major revised points.
NE55410GR
ORDERING INFORMATION
Part Number NE55410GR Order Number NE55410GR-T3-AZ Package 16-pin plastic HTSSOP (Pb-Free)
Note
Marking 55410
Supplying Form • Embossed tape 12 mm wide • Pin 1 and 8 indicates pull-out direction of tape • Qty 1 kpcs/reel
Note With regards to terminal solder (the solder contains lead) plated products (conventionally plated), contact your nearby sales office. Remark To order evaluation samples, contact your nearby sales office. Part number for sample order: NE55410GR
PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM
(Top View)
S
Pin No. 1 Pin Name Source Drain (Q2) Drain (Q2) Drain (Q2) Drain (Q2) Source Gate (Q1) Source Pin No. 9 10 11 12 13 14 15 16 Pin Name Source Gate (Q1) Source Drain (Q1) Source Gate (Q2) Gate (Q2) Source
9 10 11 12 13 14 15 16
S
Q1
S
8 7
2 3 4 5 6 7 8
S S S
S
6 5 4 3 2
Q2
S
S
S
1
S
Remark All the terminals of a Q2 connected to a circuit. Backside : Source (S)
ABSOLUTE MAXIMUM RATINGS (TA = +25°C, unless otherwise specified)
Parameter Drain to Source Voltage Gate to Source Voltage Drain Current (Q1) Drain Current (Q2) Total Device Dissipation (Tcase = 25°C) Input Power (Q1) Input Power (Q2) Channel Temperature Storage Temperature Symbol VDS VGS ID (Q1) ID (Q2) Ptot Pin (Q1) Pin (Q2) Tch Tstg f = 2.14 GHz, VDS = 28 V f = 2.14 GHz, VDS = 28 V Test Conditions Ratings 65 ±7 0.25 1.0 40 0.3 1.5 150 −65 to +150 Unit V V A A W W W °C °C
2
Data Sheet PU10542EJ02V0DS
NE55410GR
THERMAL RESISTANCE (TA = +25°C)
Parameter Channel to Case Resistance Symbol Rth (ch-c) Test Conditions MIN. − TYP. 2.5 MAX. 3.0 Unit °C/W
RECOMMENDED OPERATING CONDITIONS (TA = +25°C)
Parameter Drain to Source Voltage Gate to Source Voltage Input Power (Q1), CW Input Power (Q2), CW Symbol VDS VGS Pin (Q1) Pin (Q2) MIN. − 2.7 − − TYP. 28 3.3 15 20 MAX. 30 3.7 23 30 Unit V V dBm dBm
ELECTRICAL CHARACTERISTICS (TA = +25°C)
Parameter Q1 Gate to Source Leak Current Drain to Source Leakage Current Gate Threshold Voltage Transconductance Drain to Source Breakdown Voltage Q2 Gate to Source Leak Current Drain to Source Leakage Current Gate Threshold Voltage Transconductance Drain to Source Breakdown Voltage IGSS (Q2) IDSS (Q2) Vth (Q2) gm (Q2) VGSS = 5V VDSS = 65 V VDS = 10 V, IDS = 1 mA VDS = 28 V, IDS = 100 mA − − 2.0 − 65 − − 2.6 0.45 75 1 1 3.2 − − IGSS (Q1) IDSS (Q1) Vth (Q1) gm (Q1) VGSS = 5V VDSS = 65 V VDS = 10 V, IDS = 1 mA VDS = 28 V, IDS = 20 mA − − 2.2 − 65 − − 2.8 0.09 75 1 1 3.4 − − Symbol Test Conditions MIN. TYP. MAX. Unit
µA
mA V S V
BVDSS (Q1) IDSS = 10 µA
µA
mA V S V
BVDSS (Q2) IDSS = 10 µA
Data Sheet PU10542EJ02V0DS
3
NE55410GR
RF CHARACTERISTICS (TA = +25°C)
Parameter Q1 Gain 1 dB Compression Output Power Drain Efficiency Linear Gain Q2 Gain 1 dB Compression Output Power Drain Efficiency Linear Gain Gain 1 dB Compression Output Power Drain Efficiency Linear Gain Q1 + Q2 Gain 1 dB Compression Output Power Drain Efficiency Linear Gain Gain 1 dB Compression Output Power Drain Efficiency Output Power Linear Gain 3rd Orde.