AT24C512B

www.DataSheet4U.com Features Low-voltage and Standard-voltage Operation – 1.8 (VCC = 1.8V to 3.6V) Internally Organized 65,536 x 8 Two-wire Serial Interface Schmitt Triggers, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 1 MHz (3.6V), 400 kHz (1.8V) Compatibility Write Protect Pin for Hardware and Software Data Protection 128-byte Page Write Mode (Partial Page Writes Allowed) Self-timed Write Cycle (5 ms Max) High Reliability – Endurance: 1,000,000 Write Cycles – Data Retention: 40 Years Lead-free/Halogen-free Devices Available 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead LAP and 8-lead SAP Packages Die Sales: Wafer Form, Waffle Pack and Bumped Die Two-wire Serial EEPROM 512K (65,536 x 8) Description The AT24C512B provides 524,288 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’s cascadable feature allows up to four devices to share a common two-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead Leadless Array (LAP), and 8-lead SAP packages. In addition, the entire family is available in a 1.8V (1.8V to 3.6V) version. AT24C512B with Three Device Address Inputs Preliminary Table 1. Pin Configurations Pin Name A0–A2 SDA SCL WP NC Function A...