Secure Microcontroller
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Features
General
• High-performance, Low-power secureAVR RISC Architecture • • • • • •
– 133 Power...
Description
www.DataSheet4U.com
Features
General
High-performance, Low-power secureAVR RISC Architecture
– 133 Powerful Instructions (Most Executed in a Single Clock Cycle) – Linear Addressing of up to 8M Bytes of Code and up to 16M Bytes of Data Low-power Idle and Power-down Modes Bond Pad Locations Conforming to ISO 7816-2 ESD Protection to ± 6000V Operating Ranges: from 2.7V to 5.5V Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible Available in Wafers, Modules and Industry-standard Packages
Memory
96K Bytes of ROM Program Memory 8K Bytes of EEPROM, Including 128-byte OTP Area and 384-byte Bit-addressable Area
– 1 to 64-byte Program/Erase – 2 ms Program, 2 ms Erase – Typically 1,000,000 Write/Erase Cycles – 10 Years Data Retention 3K Bytes of RAM
Secure Microcontroller for Smart Cards AT90SC9608RC Preliminary
Peripherals
ISO 7816 Controller
– Up to 625 kbs at 5 MHz – Compliant with T = 0 and T = 1 Protocols Two I/O Ports (Configurable to Support Communication Protocols Including 2-wire Interfaces) Programmable Internal Oscillator (Up to 16 MHz on ROM) Two 16-bit Timers Random Number Generator (RNG) 2-level, 8-vector Interrupt Controller Hardware DES and Triple DES DPA Resistant Checksum Accelerator CRC 16 Engine (Compliant with ISO/IEC 3309) 8-bit GF(2n) Multiplier Crypto-coprocessor (Pre-programmed Functions for Cryptography and Authentication Including RSA, DSA, Key Generation, ECC)
Security
De...
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