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HIGH-SPEED 2.5V 16/8K X 9 DUAL-PORT STATIC RAM
.eatures
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PRELIMINARY
IDT70T16/5L
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True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial:20/25ns (max.) – Industrial: 25ns (max.) Low-power operation – IDT70T16/5L Active: 200mW (typ.) Standby: 600µW (typ.) x IDT70T16/5 easily expands data bus width to 18 bits or more using the Master/Slave select when cascading more than one device
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M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave Busy and Interrupt Flag On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port LVTTL-compatible, single 2.5V (±100mV) power supply Available in an 80-pin TQFP and 100-pin fpBGA Industrial temperature range (–40°C to +85°C) is available for selected speeds
.unctional Block Diagram
OEL CEL R/WL OER CER R/WR
I/O0L- I/O8L I/O Control BUSYL
(2,3)
I/O0R-I/O8R I/O Control BUSYR(2,3) Address Decoder
14
A13L(1) A0L
MEMORY ARRAY
14
Address Decoder
A13R(1) A0R
CEL OEL R/WL SEML (3) INTL
NOTES: 1. A 13 is a NC for IDT70T15. 2. (MASTER): BUSY is output; (SLAVE): BUSY is input. 3. BUSY outputs and INT outputs are non-tri-stated push-pull drivers.
ARBITRATION INTERRUPT SEMAPHORE LOGIC
CER OER R/WR
M/S
SEMR (3) INTR
5663 drw 01
AUGUST 2002
1
©2002 Integrated Device Technology, Inc. DSC 5663/1
IDT70T16/5L High-Speed 2.5V 16/8K x 9 Dual-Port Static RAM
PRELIMINARY Industrial and Commercial Temperature Ranges
Description
The IDT70T16/5 is a high-speed 16/8K x 9 Dual-Port Static RAM. The IDT70T16/5 is designed to be used as stand-alone Dual-Port RAMs or as a combination MASTER/SLAVE Dual-Port RAM for 18-bit-or-more wider systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT’s CMOS high-performance technology, these devices typically operate on only 200mW of power. The IDT70T16/5 is packaged in an 80-pinTQFP (Thin Quad Flatpack) and a 100-pin fpBGA (fine pitch Ball Grid array) .
Pin Configurations(1,2,3,4)
I/O1L I/O0L I/O8L OEL R/WL SEML CEL NC VDD A12L A11L A10L
07/11/02
NC A13L(1)
A7L A6L
A9L A8L
INDEX
79 78 77 76
70 69
72 71
66 65 64 63 62
80
75
68 67
61
74 73
NC NC
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43
NC I/O2L I/O3L I/O4L I/O5L VSS I/O6L I/O7L VDD NC VSS I/O0R I/O1R I/O2R VDD I/O3R I/O4R I/O5R I/O6R NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
NC A5L A4L A3L A2L A1L A0L INTL BUSYL VSS M/S.