®
STD40NF02L
N-CHANNEL 20V - 0.01 Ω - 40A DPAK LOW GATE CHARGE STripFET™ POWER MOSFET
TARGET DATA T YPE STD40NF02L
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®
STD40NF02L
N-CHANNEL 20V - 0.01 Ω - 40A DPAK LOW GATE CHARGE STripFET™ POWER MOSFET
TARGET DATA T YPE STD40NF02L
www.DataSheet4U.com s TYPICAL RDS(on)
s s s s
V DSS 20 V
R DS(on) < 0.013 Ω
ID 40 A
= 0.01 Ω TYPICAL Qg = 35 nC @ 10V OPTIMAL RDS(on) x Qg TRADE-OFF CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED
3 1
DESCRIPTION This application specific Power Mosfet is the third generation of STMicroelectronics unique ”Single Feature Size™” strip-based process. The resulting
transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck
regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS
DPAK TO-252 (Suffix ”T4”)
ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol V DS V DGR V GS I D () I D () I DM ( ) P tot Ts tg Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k Ω ) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor Storage Temperature Max. Operating Junction Temperature
o o o
Value 20 20 ± 20 20 20 80 55 0.37 -65 to 175 175
Un it V V V A A A W W /o C
o o
C C
(...