ADF4002

Data Sheet Phase Detector/Frequency Synthesizer ADF4002 FEATURES 400 MHz bandwidth 2.7 V to 3.3 V power supply Separate charge pump supply (VP) allows extended tuning voltage in 3 V systems Programmable charge pump currents 3-wire serial interface Analog and digital lock detect Hardware and software power-down mode 104 MHz phase detector APPLICATIONS Clock conditioning Clock generation IF LO generation GENERAL DESCRIPTION The ADF4002 frequency synthesizer is used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, and programmable N divider. The 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump. REFIN CLK DATA LE RFINA RFINB AVDD DVDD 24-BIT INPUT REGISTER 22 SDOUT FUNCTIONAL BLOCK DIAGRAM VP CPGND REFERENCE RSET 14-BIT R COUNTER 14 R COUNTER LATCH FUNCTION LATCH N COUNTER LATCH PHASE FREQUENCY DETECTOR CHARGE PUMP CP LOCK DETECT CURRENT SETTING 1 CURRENT SETTING 2 CPI3 CPI2 CPI1 CPI6 CPI5 CPI4 AVDD SDOUT MUX HIGH Z MUXOUT 13-BIT N COUNTER M3 M2 M1 ADF4002 06052-001 CE AGND ...