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MC74LVX132 Dataheets PDF



Part Number MC74LVX132
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description Quad 2-Input NAND Schmitt Trigger
Datasheet MC74LVX132 DatasheetMC74LVX132 Datasheet (PDF)

MC74LVX132 Quad 2-Input NAND Schmitt Trigger The MC74LVX132 is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. Pin configuration and function are the same as the MC74LVX00, but the inputs have hysteresis. The internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. Features • Hig.

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MC74LVX132 Quad 2-Input NAND Schmitt Trigger The MC74LVX132 is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. Pin configuration and function are the same as the MC74LVX00, but the inputs have hysteresis. The internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. Features • High Speed: tPD = 5.8 ns (Typ) at VCC = 3.3 V • Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C • Power Down Protection Provided on Inputs • Low Noise: VOLP = 0.5 V (Max) • Pin and Function Compatible with Other Standard Logic Families • Latchup Performance Exceeds 300 mA • ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V • These Devices are Pb−Free and are RoHS Compliant 1 A1 B1 2 3 Y1 A2 4 B2 5 6 Y2 9 A3 B3 10 12 A4 13 B4 8 Y3 11 Y4 Figure 1. Logic Diagram FUNCTION TABLE A Input B Input L L L H H L H H Y Output H H H L © Semiconductor Components Industries, LLC, 2014 1 August, 2014 − Rev. 4 http://onsemi.com SOIC−14 NB D SUFFIX CASE 751A TSSOP−14 DT SUFFIX CASE 948G PIN ASSIGNMENT VCC B4 A4 Y4 B3 A3 Y3 14 13 12 11 10 9 8 1234567 A1 B1 Y1 A2 B2 Y2 GND 14−Lead (Top View) MARKING DIAGRAMS 14 LVX132G AWLYWW 1 SOIC−14 NB 14 LVX 132 ALYWG G 1 TSSOP−14 LVX132 = Specific Device Code A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Publication Order Number: MC74LVX132/D MC74LVX132 MAXIMUM RATINGS Symbol Parameter Value Unit VCC VIN VOUT IIK IOK IOUT ICC TSTG TL TJ qJA DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance VI < GND VO < GND SOIC TSSOP −0.5 to )7.0 −0.5 to )7.0 −0.5 to VCC )0.5 −20 ±20 ±25 ±50 −65 to )150 260 )150 250 V V V mA mA mA mA _C _C _C _C/W PD Power Dissipation in Still Air at 85_C SOIC 250 mW TSSOP MSL Moisture Sensitivity Level 1 FR VESD Flammability Rating ESD Withstand Voltage Oxygen Index: 30% − 35% UL 94−V0 @ 0.125 in Human Body Model (Note 1) > 2000 V Machine Model (Note 2) > 200 Charged Device Model (Note 3) N/A ILatchup Latchup Performance Above VCC and Below GND at 85_C (Note 4) ±300 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Tested to EIA/JESD22−A114−A. 2. Tested to EIA/JESD22−A115−A. 3. Tested to JESD22−C101−A. 4. Tested to EIA.


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