3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O
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IDT74LVC823A 3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 9-BIT...
Description
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IDT74LVC823A 3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O
0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) VCC = 3.3V ± 0.3V, Normal Range VCC = 2.7V to 3.6V, Extended Range CMOS power levels (0.4µ W typ. static) Rail-to-rail output swing for increased noise margin All inputs, outputs, and I/O are 5V tolerant Supports hot insertion Available in SSOP, QSOP, and TSSOP packages
IDT74LVC823A
FEATURES:
DRIVE FEATURES:
High Output Drivers: ±24mA Reduced system switching noise
APPLICATIONS:
3.3V high speed systems 3.3V and lower voltage computing systems
The LVC823A 9-bit bus-interface flip-flop is built using advanced dual metal CMOS technology. The LVC823A device is designed specifically for driving highly capacitive or relatively low-impedance loads. The device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. With the clock-enable (CLKEN) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN high disables the clock buffer, latching the outputs. This device has noninverting data (D) inputs. Taking the clear (CLR) input low causes the nine Q outputs to go low, independently of the clock. A buffered o...
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