Document
www.DataSheet4U.com
FUJITSU SEMICONDUCTOR DATA SHEET
DS07-12530-1E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89650AR Series
MB89653AR/655AR/656AR/657AR/P657A MB89PV650A
s DESCRIPTION
The MB89650AR series has been developed as a general-purpose version of the F2MC*-8L family consisting of proprietary 8-bit, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers contain a variety of peripheral functions such as dual-clock control system, five operating speed control stages, timers, PWM timers, a serial interface, an A/D converter, external interrupts, an LCD controller/driver, and a watch prescaler. *: F2MC stands for FUJITSU Flexible Microcontroller. DataSheet4U.com F2MC-8L family CPU core Dual-clock control system Maximum memory space: 64 Kbytes Minimum execution time: 0.4 µs/10 MHz Interrupt processing time: 3.6 µs/10 MHz I/O ports: max. 64 channels 21-bit time-base counter 8-bit PWM timers: 2 channels (A maximum of 4 channels can be used for output.) 8/16-bit timer/counter: 4 channels (16 bits × 2 channels) 8-bit serial I/O: 1 channel 8-bit A/D converter: 8 channels
DataShee
s FEATURES
• • • • • • • • • • •
(Continued)
s PACKAGE
100-pin Plastic SQFP 100-pin Plastic QFP 100-pin Ceramic MQFP
DataSheet4U.com
(FPT-100P-M05)
(FPT-100P-M06)
(MQP-100C-P02)
DataSheet 4 U .com
www.DataSheet4U.com
MB89650AR Series
(Continued) • External interrupt 1 Four independent channels with edge detection function • External interrupt 2 (wake-up function) Twelve “L” level-interrupt channels • Watch prescaler • LCD controller/driver: 16 to 32 segments × 2 to 4 commons • Power-on reset function • Low-power consumption modes (subclock mode, watch mode, sleep mode, and stop mode) • SQFP-100 and QFP-100 packages
s PRODUCT LINEUP
Part number
MB89653AR MB89655AR
Parameter
MB89656AR
MB89657AR
MB89P657A
MB89PV650A
Piggyback/ evaluation product (for evaluation and development)
Classification Mass production products (mask ROM products) ROM size 8 K × 8 bits (internal mask ROM) 256 × 8 bits 16 K × 8 bits 24 K × 8 bits 32 K × 8 bits (internal (internal (internal mask mask mask ROM) ROM) ROM) One-time PROM product
32 K × 8 bits (internal PROM, programming with generalpurpose EPROM programmer)
32 K × 8 bits (external ROM)
et4U.com
DataShee
DataSheet4U.com
RAM size LCD display RAM CPU functions Number of instructions: Instruction bit length: Instruction length: Data bit length: Minimum execution time: Interrupt processing time: Input ports: Output ports: I/O ports: Total: 512 × 8 bits 768 × 8 bits 16 × 8 bits
1 K × 8 bits
136 8 bits 1 to 3 bytes 1, 8, 16 bits 0.4 µs/10 MHz to 6.4 µs/10 MHz, 61.0 µs/32.768 kHz 3.6 µs/10 MHz to 57.6 µs/10 MHz, 549.3 µs/32.768 kHz 8 (All also serve as peripherals.) 8 (All also serve as peripherals.) 48 (All also serve as peripherals.) 64
Ports
8-bit timer 1, 8-bit timer 2 8-bit timer 3, 8-bit timer 4 Clock timer 8-bit PWM timer 1, 8-bit PWM timer 2
8-bit timer operation (togg.