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ES1371 Dataheets PDF



Part Number ES1371
Manufacturers ETC
Logo ETC
Description ENSONIQ AudioPCI 97 digital controller
Datasheet ES1371 DatasheetES1371 Datasheet (PDF)

www.DataSheet4U.com ENSONIQ Proprietary Information ENSONIQ AudioPCI™ 97 ES1371 Specification 1. INTRODUCTION AudioPCI 97 is the new ENSONIQ AC97 digital controller which provides the next generation of audio performance to the PC market. AudioPCI 97 is a 5.0 Volt PCI bus compatible device that enables the ENSONIQ SoundScape PCI solution. AudioPCI 97 along with an AC97 CODEC offer the next generation of audio performance in a PC while maintaining full legacy compatibility without old ISA bu.

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www.DataSheet4U.com ENSONIQ Proprietary Information ENSONIQ AudioPCI™ 97 ES1371 Specification 1. INTRODUCTION AudioPCI 97 is the new ENSONIQ AC97 digital controller which provides the next generation of audio performance to the PC market. AudioPCI 97 is a 5.0 Volt PCI bus compatible device that enables the ENSONIQ SoundScape PCI solution. AudioPCI 97 along with an AC97 CODEC offer the next generation of audio performance in a PC while maintaining full legacy compatibility without old ISA bus solutions. Some of the capabilities of AudioPCI 97 are: • SoundScape WaveTable synthesizer . • Full DOS Game Compatibility • Multiple sample rate support • PCI Bus Master for fast DMA • Sounds are stored in Main memory. DataSheet4U.com • Access to Ensoniq’s World Famous Sound Library of over 4000 Sounds • 3 Stereo inputs and 3 mono inputs can be mixed into the output stream. • Direct I/O space access of the control registers. • 100 Pin PQFP or TQFP • External I2S input • No ISA bus pins required • Fully Compliant with PC97 Power Management specification DataShee DataSheet4U.com ENSONIQ Proprietary Information ENSONIQ AudioPCI 97 Specification Rev 1.1 Oct 1, 1997 1 DataSheet 4 U .com www.DataSheet4U.com ENSONIQ Proprietary Information 2. DESIGN CONCEPT AudioPCI 97 is a PCI bus master and slave device that is best understood by looking at the device as four interactive subsystems: the PCI interface, DMA control, LEGACY functions, and the CODEC. 2.1. PCI Interface The PCI subsystem is a bus master interface that performs the memory accesses to keep the Audio cache buffers full and empties the A/D Converter (or I2S input) buffer to main memory as required. The fundamental concept of AudioPCI 97 is that the PCI interface controller has a sufficiently large internal (on-chip) memory cache to meet the memory bandwidth requirements. There is a Sound Cache block of 64 bytes for each of the audio channels. It is the responsibility of the DMA control and the software to keep the buffers full. All system control registers are accessed via I/O on the PCI bus. AudioPCI 97 uses 16 Long Words in the I/O space for control registers. All registers are read as Long Words. All registers are written in byte word or longword format. 2.2. DMA Control AudioPCI 97 essentially implements a 3 channel DMA controller. These virtual DMA channels are implemented via the CCB, PCI and Serial interface modules. The Serial interface signals the CCB module when a cache transfer is required (playback or record). The CCB module then signals the PCI module to initiate a bus master data transfer. At this point the CCB and PCI modules will control the data transfer between host system memory and the AudioPCI 97 internal cache. et4U.com 2.3. LEGACY DataSheet4U.com DataShee The LEGACY subsystem is the circuitry required to perform SoundBlaster, OPL-FM and MPU-401 emulation. Functionally AudioPCI 97 traps on access of the SoundBlaster registers and then issues the appropriate IRQ or SERR command on the PCI bus. AudioPCI 97 handles the Legacy DMA function in a similar fashion. The exact functionality of the block cannot be fully disclosed at this time due to pending patent protection for the application of this technique. 2.4. CODEC The Codec controller supports any AC97 compliant CODEC. The functionality of the A/D and D/A sections are similar to those found in other standard CODECs. The A/D portion of the Codec is handled as an independent asynchronous event with a DMA buffer control structure. Each time the A/D FIFO is filled, a Bus Master request occurs and the FIFO is transferred to main memory. DataSheet4U.com ENSONIQ Proprietary Information ENSONIQ AudioPCI 97 Specification Rev 1.1 Oct 1, 1997 2 DataSheet 4 U .com www.DataSheet4U.com ENSONIQ Proprietary Information 3. BLOCK DIAGRAM AD[31:0] C/BE[3:0]# PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR# REQ# GNT# CLK RST# INTA# PCI Interface Block Legacy Ext IRQ GPIO[3:0] Chip Select & IRQ & GPIO Host Address Bus Host Interface Control Host Data Bus XTALi XTALo Cache Control Block Clock Generation et4U.com DataSheet4U.com High Speed Bus Mux DataShee Cache Memory Joy[7:0] Joystick UART SRC CACHE RAM Memory Data Bus Memory Address Bus MIDI Out MIDI In Sample Rate Converter AC97 CODEC Controller AC LINK: ac97_sync sdata_out bclk sdata_in Serial Control I2S [bclk,lrclk,data] DataSheet4U.com ENSONIQ Proprietary Information ENSONIQ AudioPCI 97 Specification Rev 1.1 Oct 1, 1997 3 DataSheet 4 U .com www.DataSheet4U.com ENSONIQ Proprietary Information 4. THE SYSTEM Components 4.1. PCI Interface/LEGACY The PCI subsystem is a bus master interface that performs the memory accesses to keep the Audio cache buffers full and empties the A/D Converter (or I2S input) buffer to main memory as required. All system control registers are accessed via I/O on the PCI bus. AudioPCI 97 uses 16 Long Words in the I/O space for control registers. All registers are read .


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