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Am42DL16x4D
Data Sheet
July 2003 The following document specifies Spansion memory products that are now offered by both Advanced Micro Devices and Fujitsu. Although the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any changes that have been made are the result of normal datasheet improvement and are noted in the document revision summary, where supported. Future routine revisions will occur when appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order these products, please use only the Ordering Part Numbers listed in this document.
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For More Information
DataSheet4U.com Please contact your local AMD or Fujitsu sales office for additional information about Spansion memory solutions.
Publication Number 25790 Revision A
Amendment 0 Issue Date January 9, 2002
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PRELIMINARY
Am42DL16x4D
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM DISTINCTIVE CHARACTERISTICS MCP Features
s Power supply voltage of 2.7 to 3.3 volt s High performance
— Access time as fast as 70 ns
SOFTWARE FEATURES
s Data Management Software (DMS)
— AMD-supplied software manages data programming and erasing, enabling EEPROM emulation — Eases sector erase limitations
s Package
— 69-Ball FBGA
s Supports Common Flash Memory Interface (CFI) s Erase Suspend/Erase Resume
— Suspends erase operations to allow programming in same bank
s Operating Temperature
— –40°C to +85°C
Flash Memory Features
ARCHITECTURAL ADVANTAGES
s Simultaneous Read/Write operations
— Data can be continuously read from one bank while executing erase/program functions in other bank — Zero latency between read and write operations — Factory locked and identifiable: 16 bytes available for secure, random factory Electronic Serial Number; verifiable as factory locked through autoselect function. — Customer lockable: Can be read, programmed, or erased just like other sectors. Once locked, data cannot be changed — Sophisticated power management circuits reduce power consumed during inactive periods to nearly zero
s Data# Polling and Toggle Bits
— Provides a software method of detecting the status of program or erase cycles
s Unlock Bypass Program command
— Reduces overall programming time when issuing multiple program command sequences
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HARDWARE FEATURES
s Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase cycle completion
s Secured Silicon (SecSi) Sector: Extra 64 KByte sector DataSheet4U.com s Any combination of sectors can be erased
s Hardware reset pin (RESET#)
— Hardware method of resetting the internal state machine to reading array data
s Zero Power Operation
s WP#/ACC input pin
— Write protect (WP#) function allows protection of two outermost boot sectors, regardless of sector protect status — Acceleration (ACC) function accelerates program timing
s Top or bottom boot block s Manufactured on 0.23 µm process technology s Compatible with JEDEC standards
— Pinout and software compatible with single-power-supply flash standard
s Sector protection
— Hardware method of locking a sector, either in-system or using programming equipment, to prevent any program or erase operation within that sector — Temporary Sector Unprotect allows changing data in protected sectors in-system
PERFORMANCE CHARACTERISTICS
s High performance
— 70 ns access time — Program time: 4 µs/word typical utilizing Accelerate function
SRAM Features
s Power dissipation
— Operating: 22 mA maximum — Standby: 10 µA maximum
s Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz — 10 mA active read current at 5 MHz — 200 nA in standby or automatic sleep mode
s Minimum 1 million write cycles guaranteed per sector s 20 Year data retention at 125°C
— Reliable operation for the life of the system
s s s s
CE1#s and CE2s Chip Select Power down features using CE1#s and CE2s Data retention supply voltage: 1.5 to 3.3 volt Byte data control: LB#s (DQ0–DQ7), UB#s (DQ8–DQ15)
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This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice.
Publication# 25790 Rev: A Amendment/0 Issue Date: January 9, 2002
Refer to AMD’s Website (www.amd.com) for the latest information.
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P R E L I M I N A R Y
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