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IS93C56-3

ISSI

2048-BIT SERIAL ELECTRICALLY ERASABLE PROM

www.DataSheet4U.com IS93C56-3 2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM FEATURES OVERVIEW ISSI ® MARCH 2001 • Sta...


ISSI

IS93C56-3

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www.DataSheet4U.com IS93C56-3 2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM FEATURES OVERVIEW ISSI ® MARCH 2001 State-of-the-art architecture The IS93C56-3 is a low cost 2,048-bit, non-volatile, serial E2PROM. It is fabricated using ISSI’s advanced CMOS — Non-volatile data storage E2PROM technology. The IS93C56-3 provides efficient — Low voltage operation: non-volatile read/write memory arranged as 128 registers 3.0V (Vcc = 2.7V to 6.0V) of 16 bits each. Seven 11-bit instructions control the — Full TTL compatible inputs and outputs operation of the device, which includes read, write, and — Auto increment for efficient data dump mode enable functions. The data out pin (DOUT) indicates Low voltage read operation the status of the device during in the self-timed non— Down to 2.7V volatile programming cycle. Hardware and software write protection The self-timed write cycle includes an automatic erase— Defaults to write-disabled state at power-up before-write capability. To protect against inadvertent — Software instructions for write-enable/disable writes, the WRITE instruction is accepted only while the chip is in the write enabled state. Data is written in 16 bits Advanced low voltage CMOS E2PROM per write instruction into the selected register. If Chip technology Select (CS) is brought HIGH after initiation of the write Versatile, easy-to-use Interface cycle, the Data Output (DOUT) pin will indicate the READY/ — Self-timed programming cycle BUSY status of the chip...




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