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TC59SM816CFTL

Toshiba

(TC59SM804CFT - TC59SM816CFT) SDRAM

www.DataSheet4U.com TC59SM816/08/04CFT/CFTL-70,-75,-80 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLIT...


Toshiba

TC59SM816CFTL

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www.DataSheet4U.com TC59SM816/08/04CFT/CFTL-70,-75,-80 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDS × 4 BANKS × 16-BITS SYNCHRONOUS DYNAMIC RAM 8,388,608-WORDS × 4 BANKS × 8-BITS SYNCHRONOUS DYNAMIC RAM 16,777,216-WORDS × 4 BANKS × 4-BITS SYNCHRONOUS DYNAMIC RAM DESCRIPTION TC59SM816CFT/CFTL is a CMOS synchronous dynamic random access memory organized as 4,194,304-words × 4 banks × 16 bits and TC59SM808CFT/CFTL is organized as 8,388,608 words × 4 banks × 8 bits and The TC59SM804CFT/CFTL is organized as 16,777,216 words × 4 banks × 4 bits. Fully synchronous operations are referenced to the positive edges of clock input and can transfer data up to 143M words per second. These devices are controlled by commands setting. Each bank are kept active so that DRAM core sense amplifiers can be used as a cache. The refresh functions, either Auto Refresh or Self Refresh are easy to use. By having a programmable Mode Register, the system can choose the most suitable modes which will maximize its performance. These devices are ideal for main memory in applications such as work-stations. FEATURES PARAMETER -70 tCK Clock Cycle Time (min) 7 ns 40 ns 5.4 ns 56 ns 80 mA 100 mA 3 mA TC59SM816/M808/M804 -75 7.5 ns 45 ns 5.4 ns 65 ns 75 mA 95 mA 3 mA -80 8 ns 48 ns 6 ns 68 ns 70 mA 90 mA 3 mA tRAS Active to Precharge Command Period (min) tAC tRC Access Time from CLK (max) Ref/Active to Ref/Active Command Period (min) ICC1 Operation Current (max) (Single ...




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