TC74AC139P

TC74AC139P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC139P, TC74AC139F, TC74AC139FT Dual 2-to-4 Line Decoder The TC74AC139 is an advanced high speed CMOS 2-to-4 LINE DECODER fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The active low enable input can be used for gating or it can be used as a data input for demultiplexing applications. When the enable input is held “H”, all four outputs are fixed at a high logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features High speed: tpd = 5.9 ns (typ.) at VCC = 5 V Low power dissipation: ICC = 8 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines. Balanced propagation delays: tpLH ∼− tpHL Wide operating voltage range: VCC (opr) = 2 V to 5.5 V Pin and function compatible with 74F139 Pin Assignment TC74AC139P TC74AC139F TC74AC139FT 1G 1 1A 2 1B 3 1Y0 4 1Y1 5 1Y2 6 1Y3 7 GND 8 (top view) 16 VCC 15 2G 14 2A 13 2B 12 2Y0 11 2Y1 10 2Y2 9 2Y3 Weight DIP16-P-300-2.54A SOP16-P-300-1.27A TSSOP16-P-0044-0.65A : 1.00 g (typ.) : 0.18 g (typ.) : 0.06 g (typ.) Start of commercial production 1987-05 1 2014-03-01 IEC Logic Sy...